ADSP-21364SBBCZENG AD [Analog Devices], ADSP-21364SBBCZENG Datasheet - Page 43

• Manufacturer Part Number: ADSP-21364SBBCZENG
• Description: SHARC Processor
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
OUTPUT DRIVE CURRENTS
Figure 36
ers of the ADSP-21364. The curves represent the current drive
capability of the output drivers as a function of output voltage.
TEST CONDITIONS
The ac signal specifications (timing parameters) appear
Table 12 on Page 20
output disable time, output enable time, and capacitive loading.
The timing specifications for the SHARC apply for the voltage
reference levels in
Timing is measured on signals when they cross the 1.5 V level as
described in
are measured between the point that the first signal reaches
1.5 V and the point that the second signal reaches 1.5 V.
OUTPUT
-20
-30
-40
-10
Figure 37. Equivalent Device Loading for AC Measurements
40
30
20
10
OUTPUT
PIN
Figure 38. Voltage Reference Levels for AC Measurements
0
TO
INPUT
0
shows typical I-V characteristics for the output driv-
OR
Figure 38 on Page
V OL
0.5
Figure 36. ADSP-21364 Typical Drive
1.5V
Figure
3.47V, -45° C
SWEEP (V DDEXT ) VOLTAGE (V)
through
1
(Includes All Fixtures)
37.
3.11V, 125° C
1.5
30pF
Table 38 on Page
43. All delays (in nanoseconds)
V OH
2
3.11V, 125° C
50
2.5
3.3V, 25° C
3
42. These include
Rev. PrB | Page 43 of 52 | September 2004
3.3V, 25° C
3.47V, -45° C
3.5
1.5V
1.5V
CAPACITIVE LOADING
Output delays and holds are based on standard capacitive loads:
30 pF on all pins (see
how output delays and holds vary with load capacitance. The
graphs of
outside the ranges shown for Typical Output Delay vs. Load
Capacitance and Typical Output Rise Time (20%-80%, V=Min)
vs. Load Capacitance.
12
10
0
8
6
4
2
12
10
Figure
8
6
4
2
0
Figure 39. Typical Output Rise/Fall Time (20%-80%,
0
0
Figure 40. Typical Output Fall Time (20%-80%,
39,
y = 0.0467x + 1.6323
50
Figure
y = 0.049x + 1.5105
50
Figure
LOAD CAPACITANCE (pF)
V
LOAD CAPACITANCE (pF)
V
40, and
DDEXT
DDEXT
37).
100
100
= Max)
y = 0.045x + 1.524
y = 0.0482x + 1.4604
= Min)
Figure 41
Figure 41
RISE
150
150
RISE
ADSP-21364
shows graphically
FALL
FALL
may not be linear
200
200
250
250