ADSP-21364SBBCZENG AD [Analog Devices], ADSP-21364SBBCZENG Datasheet - Page 23

• Manufacturer Part Number: ADSP-21364SBBCZENG
• Description: SHARC Processor
• Manufacturer: AD [Analog Devices]

Preliminary Technical Data
Precision Clock Generator (Direct Pin Routing)
This timing is only valid when the SRU is configured such that
the Precision Clock Generator (PCG) takes its inputs directly
from the DAI pins (via pin buffers) and sends its outputs
directly to the DAI pins. For the other cases, where the PCG’s
Table 18. Precision Clock Generator (Direct Pin Routing)
Parameter
Timing Requirements
t
t
t
Switching Characteristics
t
t
t
PCGIW
STRIG
HTRIG
DPCGIO
DTRIG
PCGOW
Input Clock Period
PCG Trigger Setup Before Falling Edge of PCG Input Clock
PCG Trigger Hold After Falling Edge of PCG Input Clock
PCG Output Clock and Frame Sync Active Edge Delay After PCG
Input Clock
PCG Output Clock and Frame Sync Delay After PCG Trigger
Output Clock Period
PCG_TRIGX_I
PCG_CLKX_O
PCG_EXTX_I
PCG_FSX_O
DAI_PN
DAI_PY
DAI_PM
(CLKIN)
DAI_PZ
Figure 15. Precision Clock Generator (Direct Pin Routing)
t
STRIG
Rev. PrB | Page 23 of 52 | September 2004
t
HTRIG
t
DTRIG
t
DPCGIO
inputs and outputs are not directly routed to/from DAI pins (via
pin buffers) there is not timing data available. All Timing
Parameters and Switching Characteristics apply to external DAI
pins (DAI_P07 – DAI_P20).
t
PCGIW
Min
24
2
2
2.5
2.5 + 2.5 × t
48
t
PCGOW
PCGOW
Max
10
10 + 2.5 × t
ADSP-21364
PCGOW
Unit
ns
ns
ns
ns