DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 195

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DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
DS3181/DS3182/DS3183/DS3184
10.15.4.1 Receive PRBS Synchronization
PRBS synchronization synchronizes the receive pattern generator to the incoming PRBS or QRSS pattern. The
receive pattern generator is synchronized by loading 32 data stream bits into the receive pattern generator, and
then checking the next 32 data stream bits. Synchronization is achieved if all 32 bits match the incoming pattern. If
at least six incoming bits in the current 64-bit window do not match the receive pattern generator, automatic pattern
re-synchronization is initiated. Automatic pattern re-synchronization can be disabled.
See
Figure 10-55
for the PRBS synchronization diagram.
Figure 10-55. PRBS Synchronization State Diagram
Sync
1 bit error
Verify
Load
32 bits loaded
10.15.4.2 Receive Repetitive Pattern Synchronization
Repetitive pattern synchronization synchronizes the receive pattern generator to the incoming repetitive pattern.
The receive pattern generator is synchronized by searching each incoming data stream bit position for the
repetitive pattern, and then checking the next 32 data stream bits. Synchronization is achieved if all 32 bits match
the incoming pattern. If at least six incoming bits in the current 64-bit window do not match the receive PRBS
pattern generator, automatic pattern re-synchronization is initiated. Automatic pattern re-synchronization can be
disabled. See Figure 10-56 for the repetitive pattern synchronization state diagram.
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