DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 376
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DS3184DK
Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3184DK.pdf
(400 pages)
Specifications of DS3184DK
Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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positive edge of JTCLK in the Update-IR state. The typical use of this instruction is in a system that has the JTAG
scan chain of multiple chips connected in series, and all of the chips have their outputs initialized using the
EXTEST mode. Then some of the chips are left initialized using the CLAMP mode and others have their IO
controlled using the EXTEST mode. This reduces the size of the scan chain during the partial testing of the system.
13.4 JTAG ID Codes
Table 13-2. JTAG ID Codes
13.5 JTAG Functional Timing
This functional timing for the JTAG circuits shows:
Figure 13-3. JTAG Functional Timing
13.6 IO Pins
All input, output, and in/out pins are in/out pins in JTAG mode.
DS3181
DS3182
DS3183
DS3184
(STATE)
DEVICE
JTRST
Output
JTCLK
(INST)
JTDO
JTMS
•
•
•
•
•
JTDI
Pin
The JTAG controller starting from reset state.
Shifting out the first 4 LSB bits of the IDCODE.
Shifting in the BYPASS instruction (111) while shifting out the mandatory X01 pattern.
Shifting the TDI pin to the TDO pin through the bypass shift register.
An asynchronous reset occurs while shifting.
Reset
X
Consult factory
Consult factory
Consult factory
Consult factory
REVISION
Run Test
ID[31:28]
Idle
Select DR
Scan
Capture
DR
IDCODE
0000000001001000
0000000001001001
0000000001001010
0000000001001011
Shift
DR
DEVICE CODE
X
ID[27:12]
Exit1
DR
Update
DR
Output pin level change if in "EXTEST" instruction mode
Select DR
376
Scan
Select IR
Scan
Capture
MANUFACTURER’S CODE
IR
Shift IR
00010100001
00010100001
00010100001
00010100001
ID[11:1]
X
Exit1
IR
Update
IR
X
Select DR
Scan
Capture
DR
BYPASS
REQUIRED
Shift
DR
ID[0]
1
1
1
1
Logic Idle
X
IDCODE
X
Test
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