DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 344

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Transmit Cell Count (TCC[15:0]) – Lower 16 bits of 24 bits. Register description follows next
register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Transmit Cell Count (TCC[23:16]) - Upper 8 bits of Register.
Transmit Cell Count (TCC[23:0]) – These 24 bits indicate the number of cells extracted from the Transmit FIFO
and output in the outgoing data stream. This register is updated via the PMU signal (see Section 10.4.5).
TCC15
TCC23
TCC7
15
15
—
0
7
0
0
7
0
TCC14
TCC22
TCC6
14
14
—
0
6
0
0
6
0
CP.TCCR1
Cell Processor Transmit Cell Count Register 1
(1,3,5,7)B4h
CP.TCCR2
Cell Processor Transmit Cell Count Register 2
(1,3,5,7)B6h
TCC13
TCC21
TCC5
13
13
—
0
5
0
0
5
0
TCC12
TCC20
TCC4
12
12
—
0
0
0
0
4
4
344
TCC11
TCC19
TCC3
11
11
—
0
3
0
0
3
0
TCC10
TCC18
TCC2
10
10
—
0
2
0
0
2
0
TCC17
TCC9
TCC1
—
9
0
1
0
9
0
1
0
TCC16
TCC8
TCC0
—
8
0
0
0
8
0
0
0