DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 266

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bit 0: Transmit FEAC Idle Latched (TFIL) – This bit is set when the TFI bit transitions from 0 to 1. Note:
Immediately after a reset, this bit will be set to one.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bit 0: Transmit FEAC Idle Interrupt Enable (TFIIE) – This bit enables an interrupt if the TFIL bit is set and the bit
in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set.
0 = interrupt disabled
1 = interrupt enabled
15
15
—
—
—
—
7
0
7
0
14
14
—
—
—
—
6
0
6
0
FEAC.TSRL
FEAC Transmit Status Register Latched
(0,2,4,6)C6h
FEAC.TSRIE
FEAC Transmit Status Register Interrupt Enable
(0,2,4,6)C8h
13
13
—
—
—
—
5
0
5
0
12
—
12
—
—
—
0
0
4
4
266
11
11
—
—
—
—
3
0
3
0
10
10
—
—
—
—
2
0
2
0
—
—
—
—
9
1
9
0
1
0
TFIIE
TFIL
—
—
8
0
8
0
0
0