DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 245

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DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: BERT Seed/Pattern (BSP[31:16]) - Upper 16 bits of 32 bits.
BERT Seed/Pattern (BSP[31:0]) – These 32 bits are the programmable seed for a transmit PRBS pattern, or the
programmable pattern for a transmit or receive repetitive pattern. BSP(31) will be the first bit output on the transmit
side for a 32-bit repetitive pattern or 32-bit length PRBS. BSP(31) will be the first bit input on the receive side for a
32-bit repetitive pattern.
BSP31
BSP23
15
0
7
0
BSP30
BSP22
14
0
6
0
BERT.SPR2
BERT Seed/Pattern Register 2
(0,2,4,6)66h
BSP29
BSP21
13
0
5
0
BSP28
BSP20
12
0
0
4
245
BSP27
BSP19
11
0
3
0
BSP26
BSP18
10
0
2
0
BSP25
BSP17
9
0
1
0
BSP24
BSP16
8
0
0
0

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