DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 223

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Bits 1 to 0: General-Purpose IO 1 Select [1:0] (GPIO1S[1:0]). These bits determine the function of the GPIO1
pin.
Register Name:
Register Description:
Register Address:
Bit #
Name
Bit #
Name
Bits 15 to 8: Not Used (—)
Bits 7 to 4: Port Interrupt Status Register [4:1] (PISR[4:1] ) The corresponding bit is set when any of the bits in
the port interrupt status registers (PORT.ISR) are set. The INT interrupt pin will be driven low when any bit is set
and the corresponding GL.ISRIE.PISRIE[4:1] interrupt enable bit is enabled.
Bit 1: Transmit System Interface Status Register Interrupt Status (TSSR) This bit is set when any of the
latched status register bits in the transmit system interface are set and enabled for interrupt. The INT pin will be
driven low when this bit is set and the GL.ISRIE.TSSRIE interrupt enable bit is enabled.
Bit 0: Global Status Register Interrupt Status (GSR) This bit is set when any of the latched status register bits in
the global latched status register (GL.SRL) are set and enabled for interrupt. The INT interrupt pin will be driven low
when this bit is set and the GL.ISRIE.GSRIE interrupt enable bit is enabled.
00 = Input
01 = Port 1 A status output selected by PORT.CR4:GPIOA[3:0] in port control registers
10 = Output logic 0
11 = Output logic 1
PISR4
15
—
7
PISR3
14
—
6
GL.ISR
Global Interrupt Status Register
010h
PISR2
13
—
5
PISR1
12
—
4
223
11
—
—
3
10
—
—
2
TSSR
—
9
1
GSR
—
8
0