DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 35

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DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
6.9 Clear-Channel ATM/Packet—OHM Mode
The Clear-Channel ATM/Packet—OHM Mode maps/demaps ATM cells or HDLC packets into/from a serial
datastream, bypassing both the DS3/E3 formatter/framer and the LIU, supporting externally defined framing
modes. Major functional blocks for the Clear-Channel ATM/Packet—OHM Mode are shown in
configuration is programmable on per-port basis and is shown in
Table 6-9. Clear-Channel ATM/Packet—OHM Mode Configuration Registers
UTOPIA L2 ATM
UTOPIA L3 ATM
POS-PHY L2 ATM
POS-PHY L3 ATM
POS-PHY L2 Packet
POS-PHY L3 Packet
Figure 6-9. Clear-Channel ATM/Packet—OHM Mode
TOHMOn
TOHMIn
TLCLKn
RLCLKn
ROHMIn
TDATn
RDATn
MODE
Clock Rate
Adapter
TUA1
FM[5:0]
1XX001
1XX001
1XX001
1XX001
1XX001
1XX001
IEEE 1149.1
Access Port
JTAG Test
SIM[1:0]
GL.CR1
00
01
10
11
10
11
GEN
UA1
PORT.CR2
PMCPE
35
X
X
1
1
0
0
Table
6-9.
RX BERT
Processor
TX BERT
Tx Packet
Rx Packet
Processor
Processor
Processor
Rx Cell
Tx Cell
Microprocessor
Interface
FIFO
Tx
FIFO
Rx
Figure
n = port # (1-4)
Interface
System
6-9. Mapping

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