DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 98

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Figure 10-1. Interrupt Structure
Figure 10-1
enable a particular interrupt. Each block has a Status Register Interrupt Enable register that must be set in order to
enable an interrupt. The next step is to unmask the interrupt at the port level, on a per-port basis. This is controlled
in the Global Interrupt Status Register Interrupt Enable register (GL.ISRIE). Now the device is ready to drive the
INT pin low when a particular status bit gets set.
For example, in order to enable DS3 Out of Frame interrupts on Port 2, the following registers would need to be
written:
Register bit
T3.RSRIE1.OOFIE
GL.ISRIE.PISRIE2
The following status registers bits will be set upon reception of OOF on Port 2:
Register bit
T3.RSRL1.OOFL
PORT.ISR.FMSR
GL.ISR.PISR2
BLOCK LATCHED
STATUS and
INTERRUPT
ENABLE
REGISTERS
SRIE bit
SRIE bit
SRIE bit
SRL bit
SRL bit
SRL bit
not only tells the user how to determine which event caused the interrupt, it also tells the user how to
Address
0x32C
0x012
Address
0x328
0x250
0x010
Value Written
0x0002
0x0020
Value Read
0x0002
0x0001
0x0020
PORT INTERRUPT
STATUS
REGISTER
PORT.ISR bit
98
Note
DS3 Out of Frame on Port 2
Framer Block Interrupt Active, Port 2
Port 2 Interrupt Active
Note
Unmask OOF interrupt on Port 2
Unmask Port 2 interrupts
GLOBAL
INTERRUPT
STATUS REGISTER
and INTERRUPT
ENABLE REGISTER
GL.ISR.PISRn
GL.ISRIE.
PISRIEn
INTERFACE INTERRUPTS
TRANSMIT SYSTEM
INTERRUPTS
PORT
INTERRUPTS
GLOBAL
INT