DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 368

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 15 to 0: Receive Aborted Packet Count (RAPC[15:0]) – Lower 16 bits of 24 bits. Register description
follows next register.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Receive Aborted Packet Count (RAPC[23:16]) - Upper 8 bits of Register.
Receive Aborted Packet Count (RAPC[23:0]) – These 24 bits indicate the number of packets received with a
packet abort indication. The byte count for these packets is included in the receive aborted byte count register
PP.REBCR.
This register is updated via the PMU signal (see Section 10.4.5).
RAPC15
RAPC23
RAPC7
15
15
—
0
7
0
0
7
0
RAPC14
RAPC22
RAPC6
14
14
—
0
6
0
0
6
0
PP.RAPCR1
Packet Processor Receive Aborted Packet Count Register 1
(1,3,5,7)DCh
PP.RAPCR2
Packet Processor Receive Aborted Packet Count Register 2
(1,3,5,7)DEh
RAPC13
RAPC21
RAPC5
13
13
—
0
5
0
0
5
0
RAPC12
RAPC20
RAPC4
12
12
—
0
0
0
0
4
4
368
RAPC11
RAPC19
RAPC3
11
11
—
0
3
0
0
3
0
RAPC10
RAPC18
RAPC2
10
10
—
0
2
0
0
2
0
RAPC17
RAPC9
RAPC1
—
9
0
1
0
9
0
1
0
RAPC16
RAPC8
RAPC0
—
8
0
0
0
8
0
0
0