DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 312

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DS3184DK

Manufacturer Part Number
DS3184DK
Description
KIT DEMO FOR DS3184
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3184DK

Main Purpose
Telecom, ATM / Packet PHYs
Utilized Ic / Part
DS3184
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Embedded
-
Primary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
12.11 Fractional DS3/E3
12.11.1 Fractional Transmit Side Register Map
The transmit side uses three registers.
Table 12-41. Fractional Transmit Side Register Map
12.11.1.1 Register Bit Descriptions
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 2 to 1: Transmit Fractional Overhead Source Control (TFOSC[1:0]) – These two bits control the source of
the transmit fractional overhead.
Bit 0: Transmit Section A Source Select (TSASS)
(1,3,5,7)40h
(1,3,5,7)42h
(1,3,5,7)44h
(1,3,5,7)46h
ADDRESS
00 = all zeros.
01 = all ones.
10 = 1010 pattern.
11 = external (TFOH).
0 = Section A contains fractional overhead
1 = Section A contains payload data
15
0
7
0
FRAC.TDGSR
FRAC.TSASR
REGISTER
FRAC.TCR
14
0
6
0
FRAC.TCR
Fractional Transmit Control Register
(1,3,5,7)40h
Fractional Transmit Control Register
Fractional Transmit Data Group Size Register
Fractional Transmit Section A Size Register
Unused
13
0
5
0
REGISTER DESCRIPTION
12
0
0
4
312
11
0
3
0
TFOSC1
10
0
2
0
TFOSC0
9
0
1
0
TSASS
8
0
0
0

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