DS3184DK Maxim Integrated Products, DS3184DK Datasheet - Page 271

• Manufacturer Part Number: DS3184DK
• Description: KIT DEMO FOR DS3184
• Manufacturer: Maxim Integrated Products

Specifications of DS3184DK

• Main Purpose: Telecom, ATM / Packet PHYs
• Utilized Ic / Part: DS3184
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Embedded: -
• Primary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 3 to 0: Transmit Trail Trace Identifier Address (TTIA[3:0]) – These four bits indicate the transmit trail trace
identifier byte to be read/written by the next memory access. Address 0h indicates the first byte of the transmit trail
trace identifier. Note: The value of these bits increments with each transmit trail trace identifier memory access
(when these bits are Fh, a memory access will return them to 0h).
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Bits 7 to 0: Transmit Trail Trace Identifier Data (TTD[7:0]) – These eight bits are the transmit trail trace identifier
data. The transmit trail trace identifier address will be incremented whenever these bits are read or written (when
address location Fh is read or written, the address will return to 0h).
TTD7
15
15
—
—
—
0
7
0
0
7
0
TTD6
14
14
—
—
—
0
6
0
0
6
0
TT.TTIAR
Trail Trace Transmit Identifier Address Register
(0,2,4,6)EAh
TT.TIR
Trail Trace Transmit Identifier Register
(0,2,4,6)ECh
Reserved
TTD5
13
13
—
—
0
5
0
0
5
0
Reserved
TTD4
12
12
—
—
0
0
0
0
4
4
271
TTIA3
TTD3
11
11
—
—
0
3
0
0
3
0
TTIA2
TTD2
10
10
—
—
0
2
0
0
2
0
TTIA1
TTD1
—
—
9
0
1
0
9
0
1
0
TTIA0
TTD0
—
—
8
0
0
0
8
0
0
0