PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 203

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 10-5:
TABLE 10-6:
© 2008 Microchip Technology Inc.
Note
Note
BF88_312C
BF88_313C DCH1ECONINV
BF88_314C
BF88_315C
BF88_316C
BF88_317C
BF88_1070
BF88_1040
BF88_3120
BF88_3124 DCH1CONCLR
BF88_3128
BF88_3130
BF88_3134 DCH1ECONCLR 31:0
BF88_3138 DCH1ECONSET 31:0
BF88_3140
BF88_3144
BF88_3148
BF88_3150
BF88_3154
BF88_3158
BF88_3160
BF88_3164
BF88_3168
BF88_3170
BF88_3174 DCH1SSIZCLR
BF88_3178
BF88_1120
Address
Address
Virtual
Virtual
1:
1:
This summary table contains partial register definitions that only pertain to the DMA peripheral. Refer to the PIC32MX Family Reference
Manual (DS61132) for a detailed description of these registers.
The starting address of the registers for DMA channel n is 0xbf883060 + 0xc0*n.
DCH1CONSET
DCH1DSACLR
DCH1SSIZSET
DCH1CONINV
DCH1SSACLR
DCH1SSASET
DCH1DSASET
DCH1SSIZINV
DCH1DSAINV
DCH1INTCLR
DCH1INTSET
DCH1SSAINV
DCH1INTINV
DCH1ECON
DCH1CON
DCH1SSIZ
DCH1SSA
DCH1DSA
DCH1INT
IEC1
IPC9
IFS1
Name
DMA CHANNEL 0 INTERRUPT REGISTER SUMMARY
DMA CHANNEL 1 SFR SUMMARY
Name
23:16
23:16
7:0
31:24
23:16
31:24
23:16
31:24
23:16
31:24
23:16
31:24
23:16
31:24
23:16
15:8
31:0
31:0
31:0
15:8
31:0
15:8
31:0
31:0
31:0
15:8
31:0
31:0
31:0
15:8
31:0
31:0
31:0
15:8
31:0
31:0
31:0
7:0
7:0
7:0
7:0
7:0
7:0
31/23/15/7
31/23/15/7
CFORCE
CHSDIE
CHSDIF
Bit
CHEN
—
—
—
Bit
—
—
—
—
—
—
—
—
—
30/22/14/6
30/22/14/6
CABORT
CHSHIE
CHSHIF
CHAED
Bit
—
—
—
Bit
—
—
—
—
—
—
—
—
—
Write inverts selected bits in DCH1ECON, read yields undefined value
Write clears selected bits in DCH1ECON, read yields undefined value
Write inverts selected bits in DCH1CON, read yields undefined value
Write inverts selected bits in DCH1SSIZ, read yields undefined value
Write inverts selected bits in DCH1DSA, read yields undefined value
Write clears selected bits in DCH1CON, read yields undefined value
Write inverts selected bits in DCH1SSA, read yields undefined value
Write clears selected bits in DCH1SSIZ, read yields undefined value
Write sets selected bits in DCH1ECON, read yields undefined value
Write clears selected bits in DCH1SSA, read yields undefined value
Write clears selected bits in DCH1DSA, read yields undefined value
Write inverts selected bits in DCH1INT, read yields undefined value
Write clears selected bits in DCH1INT, read yields undefined value
Write sets selected bits in DCH1CON, read yields undefined value
Write sets selected bits in DCH1SSIZ, read yields undefined value
Write sets selected bits in DCH1SSA, read yields undefined value
Write sets selected bits in DCH1DSA, read yields undefined value
Write sets selected bits in DCH1INT, read yields undefined value
Preliminary
29/21/13/5
29/21/13/5
CHDDIE
CHDDIF
CHCHN
PATEN
Bit
—
—
—
Bit
—
—
—
—
—
—
—
—
—
28/20/12/4
28/20/12/4
SIRQEN
CHDHIE
CHDHIF
CHAEN
Bit
—
—
Bit
—
—
—
—
—
—
CHDSA<31:24>
CHDSA<23:16>
—
—
—
CHSSA<31:24>
CHSSA<23:16>
CHDSA<15:8>
CHAIRQ<7:0>
CHSIRQ<7:0>
CHSSA<15:8>
CHSSIZ<7:0>
CHSSA<7:0>
CHDSA<7:0>
PIC32MX3XX/4XX
DMA0IP<2:0>
27/19/11/3
DMA3IE
DMA3IF
27/19/11/3
AIRQEN
CHBCIE
CHBCIF
Bit
Bit
—
—
—
—
—
—
—
—
—
—
(1)
26/18/10/2
DMA2IE
DMA2IF
26/18/10/2
CHEDET
CHCCIE
CHCCIF
Bit
Bit
—
—
—
—
—
—
—
—
—
-
25/17/9/1
DMA1IE
DMA1IF
25/17/9/1
CHTAIE
DS61143C-page 201
CHTAIF
Bit
DMA0IS<1:0>
Bit
—
—
—
—
—
—
—
—
—
—
CHPRI<1:0>
24/16/8/0
DMA0IE
DMA0IF
24/16/8/0
CHCHNS
CHERIE
CHERIF
Bit
Bit
—
—
—
—
—
—
—
—
—