PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 293

IC PIC MCU FLASH 512K 64-TQFP

PIC32MX440F512H-80I/PT

Manufacturer Part Number
PIC32MX440F512H-80I/PT
Description
IC PIC MCU FLASH 512K 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
64-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5 x 16 bit, 1 x 32 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
51
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Embedded Interface Type
EUART, I2C, PSP, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX440F512H-80I/PT
Manufacturer:
ELPIDA
Quantity:
1 000
Part Number:
PIC32MX440F512H-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 11-5:
© 2008 Microchip Technology Inc.
PRE
Hub setup
IN
Turnaround
DATA
Turnaround
PRE
HANDSHAKE
Inter-packet
Total
Note 1:
Note:
2:
Inter-packet delay of 2. An additional 5.5 bit times of latency is added to represent a worst-case propaga-
tion delay through 5 hubs.
Packets limited to 8-bytes maximum in Low-Speed mode.
Refer to Section 5.11.3 “Calculating Bus
Transaction Times” in the USB 2.0 spec-
ification for details on calculating bus
transaction time.
(1)
Packet
EXAMPLE OF SOF THRESHOLD CALCULATION: LOW SPEED VIA HUB
SYNC, PID, ADDR, ENDP, CRC5, EOP
SYNC, PID
SYNC, PID, DATA
SYNC, PID
SYNC, PID, EOP
Preliminary
(2)
Fields
, CRC16, EOP
PIC32MX3XX/4XX
Bits
16
35
99
16
19
4
8
2
2
DS61143C-page 291
FS Bits
1272
280
792
152
16
16
4
8
2
2

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