PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 91

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 5-3:
5.4.1
The delay between the end of a Reset event and when
the device actually begins to execute code is determined
by two main factors: the type of Reset and the system
clock source coming out of the Reset. The code execu-
tion start time for various types of device Resets are
summarized in Table 5-4. Individual delays are
characterized in Section 30.2 “AC Characteristics and
Timing Parameters”.
TABLE 5-4:
5.5
There are no interrupts for this module.
© 2008 Microchip Technology Inc.
POR (RCON<0>)
BOR (RCON<1>)
EXTR (RCON<7>)
SWR (RCON<6>)
CMR (RCON<9>
WDTO (RCON<4>)
SLEEP (RCON<3>)
IDLE (RCON<2>)
POR
BOR
MCLR
WDTO
SWR
CMR
Note 1:
Note: All Reset flag bits may be set or cleared by the user software.
Reset Type
2:
3:
4:
5:
6:
7:
Interrupts
T
T
T
T
T
T
Included is a required delay of 8 system clock cycles before the Reset to the CPU core is deasserted.
DEVICE RESET TO CODE
EXECUTION START TIME
STARTUP
OST
RST
POR
LOCK
FSCM
Flag Bit
= Oscillator Start-up Timer.
= T
= Power-on Reset delay.
EC, FRC, FRCDIV, LPRC
ECPLL, FRCPLL
XT, HS, SOSC
XTPLL
EC, FRC, FRCDIV, LPRC
ECPLL, FRCPLL
XT, HS, SOSC
XTPLL
Any Clock
Any Clock
Any Clock
Any Clock
= PLL lock time.
= Fail-Safe Clock Monitor delay.
RESET FLAG BIT OPERATION
CODE EXECUTION START TIME FOR VARIOUS DEVICE RESETS
VREG
= Load configuration settings, and depending on the oscillator settings, may include T
Clock Source
if on-chip regulator is enabled or T
Software Reset Command
Configuration Mismatch
T
T
T
T
POR
POR
POR
POR
WAIT Instruction
WAIT Instruction
WDT Time-Out
MCLR Reset
Code Execution
T
T
T
T
T
T
T
T
Preliminary
POR, BOR
RST
RST
RST
RST
RST
RST
RST
RST
+ T
+ T
+ T
+ T
Set by:
POR
RST
RST
RST
RST
PWRT
Delay
+ T
+ T
+ T
+ T
+ T
+ T
+ T
+ T
STARTUP
STARTUP
STARTUP
STARTUP
STARTUP
STARTUP
STARTUP
STARTUP
+ T
+ T
+ T
+ T
if on-chip regulator is disabled.
STARTUP
STARTUP
STARTUP
STARTUP
5.6
There are not I/O pin controls associated with this
module.
PIC32MX3XX/4XX
I/O Pin Control
System Clock
T
T
OST
OST
T
T
Delay
T
T
LOCK
LOCK
OST
+ T
OST
+ T
—
—
—
—
—
—
LOCK
LOCK
User Software, POR, BOR
User Software, POR, BOR
User Software, POR, BOR
User Software, POR, BOR
User Software, POR, BOR
User Software, POR, BOR
User Software
User Software
Cleared by:
FSCM
T
T
T
T
T
T
Delay
FSCM
FSCM
FSCM
FSCM
FSCM
FSCM
—
—
—
—
—
—
OST
, T
DS61143C-page 89
1, 2, 3, 7
1, 2, 3, 5, 6, 7
1, 2, 3, 4, 6, 7
1, 2, 3, 4, 5, 6, 7
2, 3, 7
2, 3, 5, 6, 7
2, 3, 4, 6, 7
2, 3, 4, 5, 6, 7
3, 7
3, 7
3, 7
3, 7
LOCK
Notes
and T
FSCM
.