PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 477

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

21.3.4
An indefinite alarm can be generated by configuring the
CHIME bit (RTCALRM<14>) = 1; ARPT can be any
value. Once the alarm is enabled and an alarm event
occurs, the ARPT count is decremented by one. ARPT
rolls over from 0x00 to 0xFF and continues to decre-
ment on each alarm event indefinitely. The ALRMEN bit
is never automatically cleared in hardware. The user
must clear this bit to disable the indefinite alarm.
It is recommended to read and verify the Alarm Sync
bit, ALRMSYNC (RTCALRM<12>) = 0, before
performing the following configuration:
EXAMPLE 21-6:
21.4
The RTCC module is intended to be clocked by an
external Real-Time Clock crystal that is oscillating at
32.768 kHz. To allow the RTCC to be clocked by an
external 32.768 kHz crystal, the SOSCEN bit
(OSCCON<1>) must be set (see Section 4.0 “Oscilla-
tors”) or the FSOSCEN (DEVCFG1<5>) Configuration
bit must be programmed to ‘1’. This is the only bit
outside of the RTCC module with which the user must
be concerned of for enabling the RTCC. The status bit,
SOSCRDY (OSCCON<22>), can be used to check that
the secondary oscillator is running.
© 2008 Microchip Technology Inc.
/*
*/
Note:
Note:
The following code example will update the RTCC indefinite alarm.
Assumes the interrupts are disabled.
unsigned long alTime=0x23352300;
unsigned long alDate=0x06111301;
while(RTCALRM&0x1000);
RTCALRMCLR=0xCFFF;
ALRMTIME=alTime;
ALRMDATE=alDate;
RTCALRMSET=0xC600;
RTCC Clock Source
INDEFINITE ALARM
An alarm event is generated when the
ARPT are = 0x00.
The RTCC does not have an exclusive
access to use the SOSC oscillator. This
oscillator may be used by other peripher-
als, such as the CPU as a low-power clock
source
“PIC32MX3XX/4XX Reference Manual”
(DS61132) regarding the operation of the
Secondary Low-Power Oscillator.
or
CONFIGURING THE RTCC FOR INDEFINITE ALARM
Timer1.
Refer
to
// set time to 23hr, 35 min, 23 sec
// set date to Monday 13 Nov 2006
// turn off the alarm, chime and alarm repeats; clear
// the alarm mask
// wait ALRMSYNC to be off
// clear ALRMEN, CHIME, AMASK, ARPT;
// update the alarm time and date
// re-enable the alarm, set alarm mask at once per
// hour, enable CHIME
the
Preliminary
• Disable alarm – ALRMEN (RTCALRM<15>) = 0.
• Enable chime – CHIME (RTCALRM<14>) = 1.
• Configure alarm repeat counter – ARPT
• Configure alarm date and time – Load
• Configure mask – Load the desired AMASK
• Enable Alarm – ALRMEN (RTCALRM<15>) = 0.
Refer to Example 21-6.
21.4.1
The real-time crystal input can be calibrated using the
periodic auto-adjust feature. When properly calibrated,
the RTCC can provide an error of less than 0.66 sec-
onds per month. Calibration has the ability to eliminate
an error of up to 260 ppm.
The calibration is accomplished by finding the number
of error clock pulses and writing this value into the CAL
field of the RTCCCON register (RTCCON<9:0>). This
10-bit signed value will either be added or subtracted
from the RTCC timer, once every minute. Refer to the
steps below for RTCC calibration:
1.
2.
(RTCALRM<7:0>) = 0 to 256.
ALRMDATE and ALRMTIME registers with the
desired alarm date/time values.
value.
Using another timer resource on the device, the
user must find the error of the 32.768 kHz
crystal.
Once the error is known, it must be converted to
the number of error clock pulses per minute.
PIC32MX3XX/4XX
CALIBRATION
DS61143C-page 475