PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 578

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX3XX/4XX
28.2.5
Boundary Scan Testing (BST) is the method of control-
ling and observing the boundary pins of the JTAG com-
pliant device, like those of the PIC32MX3XX/4XX,
utilizing software control. BST can be used to test con-
nectivity between devices by daisy-chaining JTAG
compliant devices to form a single scan chain. Several
scan chains can exist on a PCB to form multiple scan
chains. These multiple scan chains can then be driven
simultaneously to test many components in parallel.
Scan chains can contain both JTAG compliant devices
and non-JTAG compliant devices.
A key advantage of BST is that it can be implemented
without physical test probes; all that is needed is a 4-
wire interface and an appropriate test platform. Since
JTAG boundary scan has been available for many
years, many software tools exist for testing scan chains
without the need for extensive physical probing. The
main drawback to BST is that it can only evaluate digital
signals and circuit continuity; it cannot measure input or
output voltage levels or currents.
28.2.5.1
To implement BST, all JTAG test tools will require a
Boundary Scan Description Language (BSDL) file.
BSDL is a subset of VHDL (VHSIC Hardware Descrip-
tion Language), and is described as part of IEEE.
1149.1. The device-specific BSDL file describes how
the standard is implemented on a particular device and
how it operates.
The BSDL file for a particular device includes the
following:
• The pinout and package configuration for the
• The physical location of the TAP pins
• The Device ID register and the device ID
• The length of the Instruction Register
• The supported BST instructions and their binary
• The length and structure of the Boundary Scan
• The boundary scan cell definition
Device-specific BSDL files are available at Microchip’s
web site, www.microchip.com.
The name for each BSDL file is the device name and
silicon revision–for example, PIC32MX3XX/4XX
320F128L_A2.BSD is the BSDL file for
PIC32MX3XX/4XX 320F128L, silicon revision A2.
DS61143B-page 576
particular device
codes
register
BOUNDARY SCAN TESTING (BST)
Related JTAG Files
Preliminary
28.3
Programming and debugging operations are not
performed during code execution and are therefore not
affected by interrupts. Trace operations will report the
change in code execution when a interrupt occurs but
the trace controller is not affected by interrupts.
28.4
In order to interface the numerous programming and
debugging option available and still provide peripheral
access to the pins, the pins are multiplexed with periph-
erals. Table 28-7 describes the function of the
programming and debug related pins.
Interrupts
I/O Pins
© 2008 Microchip Technology Inc.