PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 296

• Manufacturer Part Number: PIC32MX440F512H-80I/PT
• Description: IC PIC MCU FLASH 512K 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX4xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 5 x 16 bit, 1 x 32 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 51
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 5
• Embedded Interface Type: EUART, I2C, PSP, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX3XX/4XX
11.33 Data Transfer with a Target Device
Complete all of the following steps to discover and con-
figure a connected device.
1.
2.
3.
4.
5.
6.
11.33.1
Three possible link states are described in the following
subsections:
• Reset
• Idle and Suspend
• Resume Signalling
DS61143C-page 294
Note:
Note:
Write the EP0 Control register (U1EP0) to
enable transmit and receive transfers as appro-
priate with handshaking enabled (unless iso-
chronous transfers are to be used). If the target
device is a low-speed device, also set the Low-
Speed Enable bit (U1EP0<LSPD>). If you want
the hardware to automatically retry indefinitely if
the target device asserts a NAK on the transfer,
clear the Retry Disable bit (U1EP0<RETRY-
DIS>).
Set up the current buffer descriptor (EVEN or
ODD) in the appropriate direction to transfer the
desired number of bytes.
Set the address of the target device in the
address register (U1ADDR<6:0>).
Write the Token register (U1TOK) with an IN or
OUT token as appropriate for the desired end-
point. This triggers the module’s transmit state
machines to begin transmitting the token and
the data.
Wait
(U1IR<TRNIF>). This will indicate that the BD
has been released back to the microprocessor
and the transfer has completed. If the retry dis-
able bit is set, the handshake (ACK, NAK,
STALL or ERROR (0xf)) will be returned in the
BD PID field. If a stall interrupt occurs, then the
pending packet must be dequeued and the error
condition in the target device cleared. If a detach
interrupt occurs (SE0 for more than 2.5 μs), then
the target has detached (U1IR<DETACHIF>).
Once
(U1IR<TRNIF>)
examined and the next data packet queued by
returning to step 2.
Use of automatic indefinite retries can lead
to a deadlock condition if the device never
responds.
USB speed, transceiver and pull-ups
should only be configured during the mod-
ule set-up phase. It is not recommended to
change these settings while the module is
enabled.
USB LINK STATES
for
the
the
transfer
occurs,
transfer
the
done
done
BD can
interrupt
interrupt
be
Preliminary
11.33.1.1
As a host, software is required to drive Reset signaling.
It may do this by setting USBRST (U1CON<4>). As per
the USB specification, the host must drive the Reset for
at least 50 ms. (This does not have to be continuous
Reset signaling. Refer to the USB 2.0 specification for
more information.) Following Reset, the host must not
initiate any downstream traffic for another 10 ms.
As a device, the USB module will assert the URSTIF
(U1IR<0>) interrupt when it has detected Reset signal-
ing for 2.5 μs. Software must perform any Reset initial-
ization processing at this time. This includes setting the
address register to 0x00 and enabling Endpoint 0. The
URSTIF interrupt will not be set again until the Reset
signaling has gone away and then has been detected
again for 2.5 μs.
11.33.1.2
The Idle state of the USB is a constant J state. When
the USB has been Idle for 3 ms, a device should go into
suspend state. During active operation, the USB host
will send a SOF token every 1 ms, preventing a device
from going into suspend state.
Once the USB link is in the suspend state, a USB host
or device must drive resume signaling prior to initiating
any bus activity. (The USB link may also be discon-
nected.)
As a USB host, software should consider the link in
suspend state as soon as software clears the SOFEN
(U1CON<0>).
As a USB device, hardware will set the IDLEIF
(U1IR<4>) interrupt when it detects a constant Idle on
the bus for 3 ms. Software should consider the link in
suspend state when the IDLEIF interrupt is set.
Once a suspend condition has been detected, the soft-
ware may wish to place the USB hardware in a Sus-
pend mode by setting USUSPEND (U1PWRC<1>).
The hardware Suspend mode gates the USB module’s
48 MHz clock and places the USB transceiver in a Low-
Power mode.
Additionally, the user may put the PIC32MX into Sleep
mode while the link is suspended.
11.33.1.3
If software wants to wake the USB from suspend state,
it may do so by setting RESUME (U1CON<2>). This
will cause the hardware to generate the proper resume
signaling (including finishing with a low-speed EOP if a
host).
A USB device should not drive resume signaling unless
the Idle state has persisted for at least 5 ms. The USB
host also must have enabled the function for remote
wake-up.
Reset
Idle and Suspend
Driving Resume Signaling
© 2008 Microchip Technology Inc.