PIC32MX440F512H-80I/PT Microchip Technology, PIC32MX440F512H-80I/PT Datasheet - Page 501

IC PIC MCU FLASH 512K 64-TQFP

PIC32MX440F512H-80I/PT

Manufacturer Part Number
PIC32MX440F512H-80I/PT
Description
IC PIC MCU FLASH 512K 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr

Specifications of PIC32MX440F512H-80I/PT

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
64-TFQFP
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC32MX4xx
Core
MIPS
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
I2C , SPI , UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
51
Number Of Timers
5 x 16 bit, 1 x 32 bit
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM320003, DM320002, MA320002
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Controller Family/series
PIC32
No. Of I/o's
51
Ram Memory Size
32KB
Cpu Speed
80MHz
No. Of Timers
5
Embedded Interface Type
EUART, I2C, PSP, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC244003 - TEST BD MPLAB REAL ICE LOOPBACKDM320003 - BOARD DEMO USB PIC32 OTGAC244006 - KIT MPLAB REAL ICE TRACEAC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX440F512H-80I/PT
Manufacturer:
ELPIDA
Quantity:
1 000
Part Number:
PIC32MX440F512H-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
EQUATION 22-4:
22.3.12
Different acquisition/conversion sequences provide dif-
ferent times for the sample-and-hold channel to acquire
the analog signal. The user must ensure the acquisition
time meets the sampling requirements.
When SSRC<2:0> (AD1CON1<7:5>) = 111, the con-
version trigger is under ADC clock control. The
SAMC<4:0> bits (AD1CON3<12:8>) select the number
of T
the start of conversion. This trigger option provides the
fastest conversion rates on multiple channels. After the
start of acquisition, the module will count a number of
T
22.3.13
When the ON bit (AD1CON1<15>) is ‘1’, the module is
in Active mode and is fully powered and functional.
When ON is ‘0’, the module is disabled. The digital and
analog portions of the circuit are turned off for maxi-
mum current savings.
In order to return to the Active mode from the Off mode,
the user must wait for the analog stages to stabilize.
For the stabilization time, refer to the Electrical
Characteristics section of the device data sheet.
© 2008 Microchip Technology Inc.
AD
T
T
Note:
SMP
SMP
AD
Note:
clocks specified by the SAMC bits.
clock cycles between the start of acquisition and
=
= Trigger Pulse Interval (T
ACQUISITION TIME
CONSIDERATIONS
TURNING THE ADC ON
Writing to ADC control bits other than
ON
(AD1CON1<1>),
(AD1CON1<0>) is not recommended
while the A/D converter is running.
T
T
SEQ
Conversion Time (T
SEQ
is the trigger pulse interval time.
– T
(AD1CON1<15>),
AVAILABLE SAMPLING
TIME, SEQUENTIAL
SAMPLING
CONV
CONV
and
SEQ
)
) –
DONE
SAMP
Preliminary
22.3.14
22.3.14.1
In manual sampling, a acquisition is started by writing a
‘1’ to the SAMP (AD1CON1<1>) bit. Software must
manually manage the start and end of the acquisition
period by setting SAMP and then clearing SAMP after
the desired acquisition period has elapsed.
22.3.14.2
In Auto-Sample mode, the sampling process is started
by writing a ‘1’ to the ASAM (AD1CON1<2>) bit. In
Auto-Sample mode, the acquisition period is defined by
ADCS<7:0> (AD1CON3<7:0>). Acquisition is automat-
ically started after a conversion is completed. Auto-
Sample mode can be used with any trigger source
other than manual.
22.3.15
The configuration for 500 ksps operation is dependent
on whether a single input pin or multiple pins will be
sampled.
22.3.15.1
The following configuration items are required to
achieve a 500 ksps conversion rate.
• Connect external V
• Set SSRC<2:0> = 111 in the AD1CON1 register
• Enable automatic sampling by setting the ASAM
• Configure the ADC clock period to be:
• Configure the sampling time to be 2 T
the recommended circuit shown in Figure 22-3.
to enable the auto convert option.
control bit in the AD1CON1 register.
by writing to the ADCS<5:0> control bits in the
AD1CON3 register.
ing: SAMC<4:0> = 00010.
-------------------------------------- -
12 1 000 000
×
PIC32MX3XX/4XX
,
1
INITIATING SAMPLING
500 KSPS CONFIGURATION
GUIDELINE
,
Manual Mode
Auto-Sample Mode
500 ksps Configuration Procedure
=
83.33ns
REF
+ and V
REF
DS61143C-page 499
- pins following
AD
by writ-

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