MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 115

• Manufacturer Part Number: MCF5407AI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407AI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 220 MHz
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 24KB
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MVZ
Operation:
Assembler Syntax MVZ <ea>y,Dx
Attributes:
Description—Zero-fill the source operand and move to the destination register. For the byte
operation, the source operand is moved to bits 7–0 of the destination and bits 31–8 are filled
with zeros. For the word operation, the source operand is moved to bits 15–0 of the
destination and bits 31–16 are filled with zeros.
Condition Codes:
Instruction Fields:
Instruction
Format:
—
X
Addressing Mode
• Size field—Specifies the size of the operation
• Register field—Specifies a data register as the destination.
• Effective address field—Specifies the source operand; use the following data
0 byte operation
1 word operation
addressing modes:
(d
(Ay) +
– (Ay)
N
0
(Ay)
16
Dy
Ay
,Ay)
15
Z
0
∗
Operand sizes supported
14
1
V
0
Opcode present
(Source with zero fill) → Destination
Size = byte, word
Mode
000
001
010
011
100
101
13
1
MVZ
C
0
12
1
reg. number:Dy
reg. number:Ay
reg. number:Ay
reg. number:Ay
reg. number:Ay
reg. number:Ay
Register
X Not affected
N Always cleared
Z Set if the result is zero; cleared otherwise
V Always cleared
C Always cleared
11
Chapter 2. ColdFire Core
REGISTER
Move with Zero-Fill
10
ColdFire Instruction Set Architecture Enhancements
9
V2, V3 Core
8
1
Addressing Mode
No
—
(d
(d
1
(d
7
#<data>
(xxx).W
(xxx).L
8
8
16
,PC,Xi)
,Ay,Xi)
,PC)
SIZ
E
6
5
MODE
EFFECTIVE ADDRESS
Mode
4
110
111
111
111
111
111
V4 Core
.b, .w
Yes
3
reg. number:Ay
2
REGISTER
Register
000
001
100
010
011
MVZ
1
0
2-49