MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 417

• Manufacturer Part Number: MCF5407AI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407AI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 220 MHz
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 24KB
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

As shown in Table 17-7, if the DMA is bus master (TT = 01), TM[2:0] indicate the type of
DMA access and provide the DMA acknowledgement information for channels 0 and 1. In
addition, TM[1:0] are multiplexed with DMA acknowledge signals for channels 0 and 1.
Table 17-9 shows TM[2:0] encodings for emulator mode accesses.
The TM signals indicate user or data transfer types during emulation transfers, while for
interrupt acknowledge transfers, the TM signals carry the interrupt level being
acknowledged; see Table 17-10.
Table 17-6. TM[2:0] Encodings for TT = 00 (Normal Access) (Continued)
Table 17-9. TM[2:0] Encodings for TT = 10 (Emulator Access)
Table 17-8. TM[1:0] Encoding for DMA as Master (TT = 01)
When TT= 01, the TM2 encoding is independent from TM[1:0]
encoding.
Table 17-7. TM2 Encoding for DMA as Master (TT = 01)
000–100
TM[2:0]
TM[1:0]
TM2
101
110
111
0
1
00
01
10
11
Chapter 17. Signal Descriptions
TM[2:0]
110
111
Single-address access negated
Single-address access
DMA acknowledges negated
DMA acknowledge, channel 0
DMA acknowledge, channel 1
Reserved
Reserved
Emulator mode data access
Emulator mode code access
Reserved
Transfer Modifier Encoding
Transfer Modifier Encoding
NOTE:
Supervisor code access
Reserved
Transfer Modifier
Transfer Modifier
MCF5407 Bus Signals
17-11