MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 262

• Manufacturer Part Number: MCF5407AI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407AI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 220 MHz
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 24KB
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chip-Select Operation
10.3.1.1 8-, 16-, and 32-Bit Port Sizing
Static bus sizing is programmable through the port size bits, CSCR[PS]. See
Section 10.4.1.3, “Chip-Select Control Registers (CSCR0–CSCR7).” Figure 10-1 shows
the correspondence between data byte lanes and the external chip-select memory. Note that
all lanes are driven, although unused lines are undefined.
10.3.1.2 Global Chip-Select Operation
CS0, the global (boot) chip select, allows address decoding for boot ROM before system
initialization. Its operation differs from other external chip-select outputs after system reset.
After system reset, CS0 is asserted for every external access. No other chip-select can be
used until the valid bit, CSMR0[V], is set, at which point CS0 functions as configured and
CS[7:1] can be used. At reset, the port size, byte enable, and automatic acknowledge
functions of the global chip-select are determined by the logic levels of the inputs on
D[7:5,3]. Table 10-4 through Table 10-6 list the various reset encodings for the
configuration signals multiplexed with D[7:5,3].
10-4
Figure 10-1. Connections for External Memory Port Sizes
Table 10-4. D7/AA, Automatic Acknowledge of Boot CS0
32-bit port
16-bit port
8-bit port
data bus
External
memory
memory
memory
D7/AA
0
1
MCF5407 User’s Manual
D[31:24]
Byte 0
Byte 0
Byte 2
Byte 0
Byte 1
Byte 2
Byte 3
Disabled
Enable with 15 wait states
BE0
Boot CS0 AA Configuration at Reset
D[23:16]
Byte 1
Byte 1
Byte 3
BE1
Driven, undefined
D[15:8]
Byte 2
Driven, undefined
BE2
Byte 3
D[7:0]
BE3