MCF5407AI220 Freescale Semiconductor, MCF5407AI220 Datasheet - Page 336

• Manufacturer Part Number: MCF5407AI220
• Description: IC MPU 32B 220MHZ COLDF 208-FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF540xr

Specifications of MCF5407AI220

• Core Processor: Coldfire V4
• Core Size: 32-Bit
• Speed: 220MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 220 MHz
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Program Memory Size: 24KB
• Cpu Speed: 220MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3.3V
• Rohs Compliant: Yes
• For Use With: M5407C3 - KIT EVAL FOR MCF5407 W/ETHERNET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Code Example
Table 13-3 describes TERn fields.
13.4 Code Example
The following code provides an example of how to initialize timer 0 and how to use the
timer for counting time-out periods.
MBARx EQU 0x10000 ;Defines the module base address at 0x10000
TMR0 EQU MBARx+0x140;Timer 0 register
TMR1 EQU MBARx+0x180 ;Timer 1 register
TRR0 EQU MBARx+0x144 ;Timer 0 reference register
TRR1 EQU MBARx+0x184 ;Timer 1 reference register
TCR0 EQU MBARx+0x148 ;Timer 0 capture register
TCR1 EQU MBARx+0x188 ;Timer 1 capture register
TCN0 EQU MBARx+0x14C ;Timer 0 counter
TCN1 EQU MBARx+0x18C ;Timer 1 counter
TER0 EQU MBARx+0x151 ;Timer 0 event register
TER1 EQU MBARx+0x191 ;Timer 1 event register
* TMR0 is defined as: *
*[PS]= 0xFF, divide clock by 256
*[CE] = 00disable interrupt
*[OM] = 0 output=active-low pulse
*[ORI] = 0, disable ref.interrupt
*[FRR] = 1, restart mode enabled
*[CLK] = 10, CLKIN/16
*[RST] = 0, timer 0 disabled
The simple example below uses 0 to count time-out loops. A time-out occurs when the
reference value, 0xAFAF, is reached.
timer0_ex
13-6
Bits
7–2
1
0
move.w #0xFF0C,D0
move.w D0,TMR0
move.w #0x0000,D0;writing to the timer counter with any
move.w DO,TCN0 ;value resets it to zero
move.w #AFAF,DO ;set the timer 0 reference to be
move.w #D0,TRR0 ;defined as 0xAFAF
clr.l DO
clr.l D1
clt.l D2
move.w #0x0000,D0
move,w D0,TCN0;reset the counter to 0x0000
move.b #0x03,D0 ;writing ones to TER0[REF,CAP]
move.b D0,TER0 ;clears the event flags
Name
REF
CAP
—
Reserved
Output reference event. The counter has reached the TRRn value. Setting TMRn[ORI] enables the
interrupt request caused by this event. Writing a one to REF clears the event condition.
Capture event. The counter value has been latched into TCRn. Setting TMRn[CE] enables the
interrupt request caused by this event. Writing a 1 to CAP clears the event condition.
Table 13-3. TERn Field Descriptions
MCF5407 User’s Manual
Description