HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 10

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

8.5
8.6
8.7
8.8
Section 9
9.1
9.2
9.3
9.4
Section 10 8-Bit Timer 2 (TIM2)
10.1 Overview............................................................................................................................ 171
10.2 Register Descriptions......................................................................................................... 173
iv
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
Interrupts............................................................................................................................ 133
8.5.1
8.5.2
Operation Timing .............................................................................................................. 135
8.6.1
8.6.2
Notes and Precautions........................................................................................................ 141
MTU Output Pin Initialization .......................................................................................... 150
8.8.1
8.8.2
8.8.3
8.8.4
Overview............................................................................................................................ 163
9.1.1
9.1.2
9.1.3
Register Descriptions......................................................................................................... 165
9.2.1
9.2.2
9.2.3
Operation ........................................................................................................................... 168
9.3.1
9.3.2
Usage Notes ....................................................................................................................... 170
9.4.1
9.4.2
10.1.1 Features ................................................................................................................ 171
10.1.2 Block Diagram...................................................................................................... 172
10.1.3 Register Configuration ......................................................................................... 172
10.2.1 Timer 2 Control/Status Register (T2CSR) ........................................................... 173
10.2.2 Timer 2 Counter (T2CNT) ................................................................................... 174
Basic Functions .................................................................................................... 116
Synchronous Operation ........................................................................................ 122
Buffer Operation .................................................................................................. 124
Cascade Connection Mode ................................................................................... 127
PWM Mode .......................................................................................................... 128
Interrupt Sources and Priority Ranking................................................................ 133
A/D Converter Activation .................................................................................... 134
Input/Output Timing ............................................................................................ 135
Interrupt Signal Timing........................................................................................ 139
Operating Modes .................................................................................................. 150
Reset Start Operation............................................................................................ 151
Operation in Case of Re-Setting Due to Error During Operation, Etc................. 151
Overview of Initialization Procedures and Mode Transitions in Case of Error
During Operation, Etc. ......................................................................................... 152
8-Bit Timer 1 (TIM1)
Features ................................................................................................................ 163
Block Diagram...................................................................................................... 164
Register Configuration ......................................................................................... 165
Timer 1 Counter (T1CNT) ................................................................................... 165
Timer 1 Control/Status Register (T1CSR) ........................................................... 166
Notes on Register Access ..................................................................................... 167
Interval Timer Operation...................................................................................... 168
Timing of Overflow Flag (OVF) Setting.............................................................. 169
Contention between Timer 1 Counter (TCNT) Write and Increment.................. 170
Rewriting Bits CKS2 to CKS0 ............................................................................. 170
.................................................................................... 163
.................................................................................... 171