HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 89

MPU 5V 0K 100-QFP

HD6417011VX20V

Manufacturer Part Number
HD6417011VX20V
Description
MPU 5V 0K 100-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7010r
Datasheet

Specifications of HD6417011VX20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
POR, PWM
Number Of I /o
11
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417011VX20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 13 (IW21)
0
1
Bit 11 (IW11)
0
1
Bit 9 (IW01)
0
1
Bit 7 (CW3)
0
1
Bit 6 (CW2)
0
1
78
Bits 7–4—Idle Specification for Continuous Access (CW3, CW2, CW1, CW0): The
continuous access idle specification makes insertions to clearly delineate the bus intervals by
once negating the CSn signal when doing consecutive accesses of the same CS space. When a
write immediately follows a read, the number of idle cycles inserted is the larger of the two
values specified by IW and CW. Refer to section 7.6, Waits between Access Cycles, for
details.
CW3 specifies the continuous access idles for CS3 space; CW2 specifies the continuous access
idles for CS2 space; CW1 specifies the continuous access idles for CS1 space and CW0
specifies the continuous access idles for CS0 space.
Bit 12 (IW20)
0
1
0
1
Bit 10 (IW10)
0
1
0
1
Bit 8 (IW00)
0
1
0
1
Description
No CS3 space continuous access idle cycles
One CS3 space continuous access idle cycle (initial value)
Description
No CS2 space continuous access idle cycles
One CS2 space continuous access idle cycle (initial value)
Description
No idle cycle after accessing CS2 space
Inserts one idle cycle
Inserts two idle cycles
Inserts three idle cycles initial value)
Description
No idle cycle after accessing CS1 space
Inserts one idle cycle
Inserts two idle cycles
Inserts three idle cycles initial value)
Description
No idle cycle after accessing CS0 space
Inserts one idle cycle
Inserts two idle cycles
Inserts three idle cycles initial value)

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