HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 107

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Channels 0:
Bit 7:
CCLR2
0
1
Notes: 1. Setting the SYNC bit of the TSYR to 1 sets the synchronization.
Channels 1, 2:
Bit 7:
Reserved*
0
Notes: 1. The bit 7 of channels 1 and 2 is reserved. It always reads 0, and cannot be modified.
96
Bits 7–5—Counter Clear 2, 1, 0 (CCLR2, CCLR1, CCLR0): Select the counter clear source for
the TCNT counter.
Bits 4–3—Clock Edge 1, 0 (CKEG1 and CKEG0): CKEG1 and CKEG0 select the input clock
edges. When counting is done on both edges of the internal clock the input clock frequency
becomes 1/2 (Example: both edges of
2. When TGRC or TGRD are functioning as buffer registers, TCNT is not cleared because
2. Setting the SYNC bit of the TSYR to 1 sets the synchronization.
Bit 6:
CCLR1
0
1
0
1
1
the buffer registers have priority and compare-match/input captures do not occur.
Bit 6:
CCLR1
0
1
Bit 5:
CCLR0
0
1
0
1
0
1
0
1
Bit 5:
CCLR0
0
1
0
1
Description
TCNT clear disabled (initial value)
TCNT is cleared by TGRA compare-match or input capture
TCNT is cleared by TGRB compare-match
Synchronizing clear: TCNT is cleared in synchronization with clear of
other channel counters operating in sync.*
TCNT clear disabled
TCNT is cleared by TGRC compare-match or input capture*
TCNT is cleared by TGRD compare-match*
Synchronizing clear: TCNT is cleared in synchronization with clear of
other channel counters operating in sync*
Description
TCNT clear disabled (initial value)
TCNT is cleared by TGRA compare-match or input capture
TCNT is cleared by TGRB compare-match or input capture
Synchronizing clear: TCNT is cleared in synchronization with
clear of other channel counters operating in sync*
= rising edge of
).
1
1
2
2
2