HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 136

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Procedure for Setting Buffer Mode (Figure 8.18):
1. Use the timer I/O control register (TIOR) to set the TGR as either an input capture or output
2. Use the timer mode register (TMDR) BFA, and BFB bits to set the TGR for buffer mode.
3. Set the CST bit in the TSTR to 1 to start the count operation.
Buffer Operation Examples—when TGR Is an Output Compare Register: Figure 8.19 shows
an example of channel 0 set to PWM mode 1, and the TGRA and TGRC registers set for buffer
operation.
The TCNT counter is cleared by a compare-match B, and the output is a 1 upon compare-match A
and 0 output upon compare-match B. Because buffer mode is selected, a compare-match A
changes the output, and the buffer register TGRC value is simultaneously transferred to the
general register TGRA. This operation is repeated with each occurrence of a compare-match A.
See section 8.4.6, PWM Mode, for details on the PWM mode.
compare register.
Figure 8.18 Buffer Operation Setting Procedure
Select TGR function
Select buffer mode
Start counting
Buffer mode
Buffer mode
(1)
(2)
(3)
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