HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 9

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

6.5
Section 7
7.1
7.2
7.3
7.4
7.5
Section 8
8.1
8.2
8.3
8.4
6.4.2
Interrupt Response Time.................................................................................................... 70
Overview............................................................................................................................ 73
7.1.1
7.1.2
7.1.3
7.1.4
7.1.5
Description of Registers .................................................................................................... 77
7.2.1
7.2.2
Accessing Ordinary Space................................................................................................. 82
7.3.1
7.3.2
7.3.3
Waits between Access Cycles ........................................................................................... 86
7.4.1
7.4.2
Memory Connection Examples ......................................................................................... 88
Overview............................................................................................................................ 89
8.1.1
8.1.2
8.1.3
8.1.4
MTU Register Descriptions............................................................................................... 95
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
8.2.9
Bus Master Interface.......................................................................................................... 114
8.3.1
8.3.2
Operation ........................................................................................................................... 116
8.4.1
Stack after Interrupt Exception Processing .......................................................... 70
Bus State Controller (BSC)
Features ................................................................................................................ 73
Block Diagram...................................................................................................... 74
Pin Configuration ................................................................................................. 75
Register Configuration ......................................................................................... 75
Address Map ........................................................................................................ 76
Bus Control Register 2 (BCR2)............................................................................ 77
Wait Control Register 1 (WCR1) ......................................................................... 80
Basic Timing ........................................................................................................ 82
Wait State Control ................................................................................................ 83
CS Assert Period Extension.................................................................................. 85
Prevention of Data Bus Conflicts .........................................................................
Simplification of Bus Cycle Start Detection ........................................................ 87
Multifunction Timer Pulse Unit (MTU)
Features ................................................................................................................ 89
Block Diagram...................................................................................................... 92
Pin Configuration ................................................................................................. 93
Register Configuration ......................................................................................... 94
Timer Control Register (TCR) ............................................................................. 95
Timer Mode Register (TMDR) ............................................................................ 99
Timer I/O Control Register (TIOR) ..................................................................... 100
Timer Interrupt Enable Register (TIER) .............................................................. 107
Timer Status Register (TSR) ................................................................................ 109
Timer Counters (TCNT)....................................................................................... 111
Timer General Register (TGR) ............................................................................ 112
Timer Start Register (TSTR)................................................................................ 112
Timer Synchro Register (TSYR).......................................................................... 113
16-Bit Registers.................................................................................................... 114
8-Bit Registers...................................................................................................... 114
Overview .............................................................................................................. 116
......................................................................... 73
.................................................. 89
86
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