HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 88

• Manufacturer Part Number: HD6417011VX20V
• Description: MPU 5V 0K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7010r

Specifications of HD6417011VX20V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: POR, PWM
• Number Of I /o: 11
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

7.2
7.2.1
BCR2 is a 16-bit read/write register that specifies the number of idle cycles and CS signal assert
extension of each CS space.
BCR2 is initialized by power-on resets to H'FFFF.
Bit 15 (IW31)
0
1
Bits 15–8—Idles between Cycles (IW31, IW30, IW21, IW20, IW11, IW10, IW01, IW00):
These bits specify idle cycles inserted between consecutive accesses when the second one is to
a different CS area after a read. Idles are used to prevent data conflict between ROM (and
other memories, which are slow to turn the read data buffer off), fast memories, and I/O
interfaces. Even when access is to the same area, idle cycles must be inserted when a read
access is followed immediately by a write access. The idle cycles to be inserted comply with
the area specification of the previous access Refer to section 7.4, Waits between Access
Cycles, for details.
IW31, IW30 specify the idle between cycles for CS3 space; IW21, IW20 specify the idle
between cycles for CS2 space; IW11, IW10 specify the idle between cycles for CS1 space and
IW01, IW00 specify the idle between cycles for CS0 space.
Initial value:
Initial value:
Description of Registers
Bus Control Register 2 (BCR2)
R/W:
R/W:
Bit:
Bit:
IW31
CW3
R/W
R/W
15
1
7
1
Bit 14 (IW30)
0
1
0
1
IW30
CW2
R/W
R/W
14
1
6
1
IW21
CW1
R/W
R/W
13
1
5
1
IW20
CW0
R/W
R/W
12
1
4
1
Description
No idle cycle after accessing CS3 space
Inserts one idle cycle
Inserts two idle cycles
Inserts three idle cycles initial value)
IW11
SW3
R/W
R/W
11
1
3
1
IW10
SW2
R/W
R/W
10
1
2
1
IW01
SW1
R/W
R/W
9
1
1
1
IW00
SW0
R/W
R/W
8
1
0
1
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