HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 354

SH1 ROMLESS LEAD FREE

HD6417032F20V

Manufacturer Part Number
HD6417032F20V
Description
SH1 ROMLESS LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Manufacturer
Quantity
Price
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TI
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Manufacturer:
RENESAS
Quantity:
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Section 11 Programmable Timing Pattern Controller (TPC)
Bit 2—Group 2 Non-Overlap Mode (G2NOV): G2NOV selects ordinary or non-overlap mode
for TPC output group 2 (TP11–TP8).
Bit 2: G2NOV
0
1
Bit 1—Group 1 Non-Overlap Mode (G1NOV): G1NOV selects ordinary or non-overlap mode
for TPC output group 1 (TP7–TP4).
Bit 1: G1NOV
0
1
Bit 0—Group 0 Non-Overlap Mode (G0NOV): G0NOV selects ordinary or non-overlap mode
for TPC output group 0 (TP3–TP0).
Bit 0: G0NOV
0
1
11.3
11.3.1
When corresponding bits in the PBCR1, PBCR2, NDERA, and NDERB registers are set to 1, TPC
output is enabled and the PBDR data register values are output. After that, when the compare
match event selected by TPCR occurs, the next data register contents (NDRA and NDRB) are
transferred to PBDR and output values are updated. Figure 11.2 illustrates the TPC output
operation.
Rev. 7.00 Jan 31, 2006 page 326 of 658
REJ09B0272-0700
Operation
Overview
Description
TPC output group 2 operates normally (output value updated according to
compare match A of the ITU channel selected by TPCR)
TPC output group 2 operates in non-overlap mode (1 output and 0 output can
be performed independently according to compare match A and B of the ITU
channel selected by TPCR)
Description
TPC output group 1 operates normally (output value updated according to
compare match A of the ITU channel selected by TPCR)
TPC output group 1 operates in non-overlap mode (1 output and 0 output can
be performed independently according to compare match A and B of the ITU
channel selected by TPCR)
Description
TPC output group 0 operates normally (output value updated according to
compare match A of the ITU channel selected by TPCR)
TPC output group 0 operates in non-overlap mode (1 output and 0 output can
be performed independently according to compare match A and B of the ITU
channel selected by TPCR)
(Initial value)
(Initial value)
(Initial value)

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