HD6417032F20V Renesas Electronics America, HD6417032F20V Datasheet - Page 613

SH1 ROMLESS LEAD FREE

HD6417032F20V

Manufacturer Part Number
HD6417032F20V
Description
SH1 ROMLESS LEAD FREE
Manufacturer
Renesas Electronics America
Series
SuperH® SH7030r
Datasheet

Specifications of HD6417032F20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417032F20V
Manufacturer:
TI
Quantity:
201
Part Number:
HD6417032F20V
Manufacturer:
RENESAS
Quantity:
20
A.2.17
Start Address: H'5FFFF07 (channel 0), H'5FFFF11 (channel 1), H'5FFFF1B (channel 2),
H'5FFFF25 (channel 3), H'5FFFF35 (channel 4),
Bus Width: 8
Bit
Initial value
Read/Write
Notes: 1. Undetermined
Table A.18 TSR0–TSR4 Bit Functions
Bit
2
1
0
Bit name
Overflow flag (OVF)
Input capture/compare match
flag B (IMFB)
Input capture/compare match
flag A (IMFA)
2. Only 0 can be written, to clear the flag.
Timer Status Registers 0–4 (TSR0–TSR4)
*
7
1
6
1
Value
0
1
0
1
0
1
5
1
Appendix A On-Chip Supporting Module Registers
Description
Clear conditions: 0 is written in OVF after
reading OVF = 1
Set conditions: TCNT value overflows (H'FFFF
Clear conditions: 0 is written in IMFB after
reading IMFB = 1
Set conditions: (1) When GRB is functioning as
the output compare register, and TCNT = GRB;
(2) When GRB is functioning as the input
capture register, and the TCNT value is
transferred to GRB by the input capture signal
Clear conditions: 0 is written in IMFA after
reading IMFA = 1
Set conditions: (1) When GRA is functioning as
the output compare register, and TCNT = GRA;
(2) When GRA is functioning as the input
capture register, and the TCNT value is
transferred to GRA by the input capture signal
H'0000) or underflows (H'FFFF
4
1
Rev. 7.00 Jan 31, 2006 page 585 of 658
3
1
R/(W) *
OVF
2
0
2
REJ09B0272-0700
R/(W) *
IMFB
1
0
(Initial value)
(Initial value)
(Initial value)
H'0000)
2
R/(W) *
IMFA
0
0
ITU
2

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