MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 162

• Manufacturer Part Number: MCIMX53-START
• Description: KIT DEVELOPMENT I.MX53
• Manufacturer: Freescale Semiconductor
• Series: i.MX53r
• Type: MCUr

Specifications of MCIMX53-START

• Contents: Board
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: Cortex - A8
• Silicon Core Number: I.MX5
• Silicon Family Name: I.MX53
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: i.MX53
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Package Information and Contact Assignments
162
DRAM_SDBA
2
DRAM_SDCK
E0
DRAM_SDCK
E1
DRAM_SDCL
K_0
DRAM_SDCL
K_0_B
DRAM_SDCL
K_1
DRAM_SDCL
K_1_B
DRAM_SDOD
T0
DRAM_SDOD
T1
DRAM_SDQS
0
DRAM_SDQS
0_B
DRAM_SDQS
1
DRAM_SDQS
1_B
DRAM_SDQS
2
DRAM_SDQS
2_B
DRAM_SDQS
3
DRAM_SDQS
3_B
DRAM_SDWE L19
Package Pin
Name
N19
H19
T19
K23
K22
P22
P23
J18
R18
H23
H22
D23
D22
T22
T23
Y22
Y23
Table 110. 19 x 19 mm Signal Assignments, Power Rails, and I/O (continued)
Package
Assign
ment
Pin
i.MX53xD Applications Processors for Consumer Products, Rev. 1
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
Power Rail
DDR3
DDR3
DDR3
DDR3CLK
DDR3CLK
DDR3CLK
DDR3CLK
DDR3
DDR3
DDR3CLK
DDR3CLK
DDR3CLK
DDR3CLK
DDR3CLK
DDR3CLK
DDR3CLK
DDR3CLK
DDR3
I/O Buffer
Type
Mode
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
Alt.
EXTMC emi_DRAM_SDB
EXTMC emi_DRAM_SDC
EXTMC emi_DRAM_SDC
EXTMC emi_DRAM_SDC
EXTMC emi_DRAM_SDC
EXTMC emi_DRAM_SDC
EXTMC emi_DRAM_SDC
EXTMC emi_DRAM_ODT
EXTMC emi_DRAM_ODT
EXTMC emi_DRAM_SDQ
EXTMC emi_DRAM_SDQ
EXTMC emi_DRAM_SDQ
EXTMC emi_DRAM_SDQ
EXTMC emi_DRAM_SDQ
EXTMC emi_DRAM_SDQ
EXTMC emi_DRAM_SDQ
EXTMC emi_DRAM_SDQ
EXTMC emi_DRAM_SD
Out of Reset Condition
A[2]
KE[0]
KE[1]
LK0
LK0_B
LK1
LK1_B
[0]
[1]
S[0]
S_B[0]
S[1]
S_B[1]
S[2]
S_B[2]
S[3]
S_B[3]
WE
Block I/O
Freescale Semiconductor
Directio
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
n
1
Config./
Floating
Floating
Floating
Floating
Value
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low