MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 67

KIT DEVELOPMENT I.MX53

MCIMX53-START

Manufacturer Part Number
MCIMX53-START
Description
KIT DEVELOPMENT I.MX53
Manufacturer
Freescale Semiconductor
Series
i.MX53r
Type
MCUr
Datasheets

Specifications of MCIMX53-START

Contents
Board
Silicon Manufacturer
Freescale
Core Architecture
ARM
Core Sub-architecture
Cortex - A8
Silicon Core Number
I.MX5
Silicon Family Name
I.MX53
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Leaded Process Compatible
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
i.MX53
Lead Free Status / Rohs Status
Supplier Unconfirmed

Available stocks

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Price
Part Number:
MCIMX53-START
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4.7.2.4
Figure 31
characteristics.
4.7.3
The ESAI consists of independent transmitter and receiver sections, each section with its own clock
generator.
found in
Freescale Semiconductor
1
2
See specific I/O AC parameters
SPI_RDY is sampled internally by ipg_clk and is asynchronous to all other CSPI signals.
CS10
CS5
CS6
CS7
CS8
CS9
CS1
CS2
CS4
CS5
CS6
CS7
CS8
CS9
ID
ID
Figure 32
depicts the timing of ECSPI in slave mode.
Table 45
Enhanced Serial Audio Interface (ESAI) Timing Parameters
SSx Lead Time (CS setup time)
SSx Lag Time (CS hold time)
MOSI Propagation Delay (C
MISO Setup Time
MISO Hold Time
RDY to SSx Time
SCLK Cycle Time–Read
SCLK Cycle Time–Write
SCLK High or Low Time–Read
SCLK High or Low Time–Write
SSx pulse width
SSx Lead Time (CS setup time)
SSx Lag Time (CS hold time)
MOSI Setup Time
MOSI Hold Time
MISO Propagation Delay (C
ECSPI Slave Mode Timing
and
shows the interface timing values. The number field in the table refers to timing signals
Table 43. ECSPI Master Mode Timing Parameters (continued)
i.MX53xD Applications Processors for Consumer Products, Rev. 1
Figure
2
Section 4.5, “I/O AC
Table 44. ECSPI Slave Mode Timing Parameters
Parameter
Parameter
33.
LOAD
LOAD
= 20 pF)
= 20 pF)
Parameters”
Table 44
Symbol
Symbol
t
t
PDmosi
t
t
t
t
t
PDmiso
t
t
t
Smiso
Hmiso
t
t
Smosi
Hmosi
SDRY
CSLH
t
HCS
HCS
SCS
SCS
t
SW
clk
lists the ECSPI slave mode timing
Half SCLK period
Min
-0.5
Min
8.5
15
40
20
5
5
0
5
7
5
5
4
4
4
Electrical Characteristics
Max
Max
2.5
17
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
67

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