MCIMX53-START Freescale Semiconductor, MCIMX53-START Datasheet - Page 99

• Manufacturer Part Number: MCIMX53-START
• Description: KIT DEVELOPMENT I.MX53
• Manufacturer: Freescale Semiconductor
• Series: i.MX53r
• Type: MCUr

Specifications of MCIMX53-START

• Contents: Board
• Silicon Manufacturer: Freescale
• Core Architecture: ARM
• Core Sub-architecture: Cortex - A8
• Silicon Core Number: I.MX5
• Silicon Family Name: I.MX53
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Leaded Process Compatible: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: i.MX53
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Display operation can be performed with IPP_WAIT signal. The DI reacts to the incoming IPP_WAIT
signal with 2 DI_CLK delay. The DI finishes a current access and a next access is postponed until
IPP_WAIT release.
Freescale Semiconductor
(READ/WRITE)
IPP_CS
(READ/WRITE)
IPP_CS
IPP_DATA
IPP_DATA
(ENABLE)
RD
(ENABLE)
RS
WR
RS
RD
WR
Single access mode (all control signals are not active for one display interface clock after each display access)
Figure 53. Asynchronous Parallel System 68k Interface (Type 2) Timing Diagram
Figure 54
i.MX53xD Applications Processors for Consumer Products, Rev. 1
shows timing of the parallel interface with IPP_WAIT control.
Burst access mode with sampling by ENABLE signal
Electrical Characteristics
99