MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 11

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MCIMX535DVV1C

Manufacturer Part Number
MCIMX535DVV1C
Description
IMX53 REV 2.1 COMM
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCIMX535DVV1C

Rohs Compliant
YES
Core Size
32bit
Program Memory Size
288KB
Cpu Speed
1GHz
Digital Ic Case Style
BGA
No. Of Pins
529
Supply Voltage Range
1.25V To 1.35V
Operating Temperature Range
-20°C To +85°C
Msl
MSL 3 - 168 Hours
Embedded Interface Type
I2C, SPI, UART
Lead Free Status / Rohs Status
Supplier Unconfirmed

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Freescale Semiconductor
Mnemonic
GPIO-1
GPIO-2
GPIO-3
GPIO-4
GPIO-5
GPIO-6
GPIO-7
GPU3D
GPU2D
Block
I2C-1
I2C-2
I2C-3
GPT
IIM
General Purpose
I/O Modules
General Purpose
Timer
Graphics
Processing Unit
Graphics
Processing
Unit-2D
I
IC Identification
Module
2
C Controller
Block Name
i.MX53xD Applications Processors for Consumer Products, Rev. 3
Table 2. i.MX53xD Digital and Analog Blocks (continued)
System
Control
Peripherals
Timer
Peripherals
Multimedia
Peripherals
Multimedia
Peripherals
Connectivity
Peripherals
Security
Subsystem
These modules are used for general purpose input/output to external ICs.
Each GPIO module supports up to 32 bits of I/O.
Each GPT is a 32-bit “free-running” or “set and forget” mode timer with a
programmable prescaler and compare and capture register. A timer counter
value can be captured using an external event, and can be configured to
trigger a capture event on either the leading or trailing edges of an input
pulse. When the timer is configured to operate in “set and forget” mode, it is
capable of providing precise interrupts at regular intervals with minimal
processor intervention. The counter has output compare logic to provide the
status and interrupt at comparison. This timer can be configured to run
either on an external clock or on an internal clock.
The GPU, version 3, provides hardware acceleration for 2D and 3D
graphics algorithms with sufficient processor power to run desk-top quality
interactive graphics applications on displays up to HD1080 resolution. It
supports color representation up to 32 bits per pixel. GPU enables
high-performance mobile 3D and 2D vector graphics at rates up to 33
Mtriangles/s, 200 Mpix/s, 800 Mpix/s (z).
The GPU2D version 1, provides hardware acceleration for 2D graphic
algorithms with sufficient processor power to run desk-top quality
interactive graphics applications on displays up to HD1080 resolution.
I
up to 400 kbps are supported.
The IC identification module (IIM) provides an interface for reading,
programming, and/or overriding identification and control information stored
in on-chip fuse elements. The module supports electrically programmable
poly fuses (e-Fuses). The IIM also provides a set of volatile
software-accessible signals that can be used for software control of
hardware elements not requiring non-volatility. The IIM provides the primary
user-visible mechanism for interfacing with on-chip fuse elements. Among
the uses for the fuses are unique chip identifiers, mask revision numbers,
cryptographic keys, JTAG secure mode, boot characteristics, and various
control signals requiring permanent non-volatility. The IIM also provides up
to 28 volatile control signals. The IIM consists of a master controller, a
software fuse value shadow cache, and a set of registers to hold the values
of signals visible outside the module.
IIM interfaces to the electrical fuse array (split to banks). Enabled to set up
boot modes, security levels, security keys and many other system
parameters.
i.MX53xDA consists of 4 x 256-bit + 1x 128-bit fuse-banks (total 1152 bits)
through IIM interface.
2
C provides serial interface for controlling peripheral devices. Data rates of
Brief Description
Modules List
11

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