MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 65

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MCIMX535DVV1C

Manufacturer Part Number
MCIMX535DVV1C
Description
IMX53 REV 2.1 COMM
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCIMX535DVV1C

Rohs Compliant
YES
Core Size
32bit
Program Memory Size
288KB
Cpu Speed
1GHz
Digital Ic Case Style
BGA
No. Of Pins
529
Supply Voltage Range
1.25V To 1.35V
Operating Temperature Range
-20°C To +85°C
Msl
MSL 3 - 168 Hours
Embedded Interface Type
I2C, SPI, UART
Lead Free Status / Rohs Status
Supplier Unconfirmed

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4.6.7
The DDR2/LVDDR2 interface fully complies with JESD79-2E – DDR2 JEDEC release April, 2008,
supporting DDR2-800 and LVDDR2-800.
The DDR3 interface fully complies with JESD79-3D – DDR3 JEDEC release April 2008 supporting
DDR3-800.
The LPDDR2 interface fully complies with JESD209-2B, supporting LPDDR2-800.
Figure 28
Freescale Semiconductor
DDR1
DDR2
ID
SDCLK
SDCLK
ADDR
ODT/CKE
RAS
CAS
and
WE
SDRAM clock high-level width
SDRAM clock low-level width
CS
DDR SDRAM Specific Parameters (DDR2/LVDDR2, LPDDR2, and
DDR3)
DDR6
DDR4
Figure 28. DDR SDRAM Address and Control Parameters for DDR2 and DDR3
Table 41
ROW/BA
i.MX53xD Applications Processors for Consumer Products, Rev. 3
show the address and control timing parameters for DDR2 and DDR3.
Parameter
DDR5
Table 41. DDR SDRAM Timing Parameter Table
DDR5
DDR7
DDR4
DDR4
COL/BA
DDR5
DDR4
DDR5
Symbol
t
t
CH
CL
DDR1
0.48
0.48
Min
SDCLK = 400 MHz
DDR2
1 2
Max
0.52
0.52
Electrical Characteristics
Units
t
t
CK
CK
65

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