MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 64

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MCIMX535DVV1C

Manufacturer Part Number
MCIMX535DVV1C
Description
IMX53 REV 2.1 COMM
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCIMX535DVV1C

Rohs Compliant
YES
Core Size
32bit
Program Memory Size
288KB
Cpu Speed
1GHz
Digital Ic Case Style
BGA
No. Of Pins
529
Supply Voltage Range
1.25V To 1.35V
Operating Temperature Range
-20°C To +85°C
Msl
MSL 3 - 168 Hours
Embedded Interface Type
I2C, SPI, UART
Lead Free Status / Rohs Status
Supplier Unconfirmed

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Electrical Characteristics
64
1
2
3
4
5
6
7
MAXDI
MAXC
MAXC
MAXD
WE43
WE44
WE45
WE46
WE47
WE48
Parameters WE4... WE21 value see column BCD = 0 in
All config. parameters (CSA,CSN,WBEA,WBEN,ADVA,ADVN,OEN,OEA,RBEA & RBEN) are in cycle units.
CS Assertion. This bit field determines when CS signal is asserted during read/write cycles.
CS Negation. This bit field determines when CS signal is negated during read/write cycles.
t is axi_clk cycle time.
BE Assertion. This bit field determines when BE signal is asserted during read cycles.
BE Negation. This bit field determines when BE signal is negated during read cycles.
Ref
No.
SO
TI
O
DTACK MAXIMUM delay from
Dtack Active to CSx_B Invalid
internal driving ADDR/control
chip dtack input to its internal
Output max. delay from CSx
chip input data to its internal
DATA MAXIMUM delay from
CSx_B Valid to BEy_B Valid
CSx_B Invalid to Input Data
internal driving FFs to CSx
Input Data Valid to CSx_B
BEy_B Invalid to CSx_B
Output max. delay from
CSx_B Invalid to Dtack
Invalid (Write access)
FFs to chip outputs.
FF + 2 cycles for
Table 40. EIM Asynchronous Timing Parameters Table Relative Chip Select
synchronization
(Write access)
Parameter
Invalid
invalid
invalid
out.
FF
i.MX53xD Applications Processors for Consumer Products, Rev. 3
MAXCO - MAXCSO + MAXDI
WE12 - WE6 + (WBEA - CSA)
Synchronous measured
WE7 - WE13 + (WBEN -
MAXCO - MAXCSO +
Determination by
parameters
Table 39
MAXDTI
CSN)
10
10
5
0
0
12
MAXCSO +
MAXCSO +
MAXCO -
MAXCO
MAXDTI
MAXDI
Min
0
0
-
-3 + (WBEN - CSN)
3 + (WBEA - CSA)
supported by
(If 133 Mhz is
Freescale Semiconductor
SOC)
Max
Unit
ns
ns
ns
ns
ns
ns
ns

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