MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 30

• Manufacturer Part Number: MCIMX535DVV1C
• Description: IMX53 REV 2.1 COMM
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX535DVV1C

• Rohs Compliant: YES
• Core Size: 32bit
• Program Memory Size: 288KB
• Cpu Speed: 1GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 529
• Supply Voltage Range: 1.25V To 1.35V
• Operating Temperature Range: -20°C To +85°C
• Msl: MSL 3 - 168 Hours
• Embedded Interface Type: I2C, SPI, UART
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Electrical Characteristics
1
2
3
4
4.3.2
The LPDDR2 I/O pads support DDR2/LVDDR2, LPDDR2, and DDR3 operational modes.
4.3.2.1
The DDR2 interface fully complies with JESD79-2E DDR2 JEDEC standard release April, 2008. The
parameters in
30
Low-level output current
(1.65-3.1V OVDD)
High-Level DC input voltage
Low-Level DC input voltage
Input Hysteresis
Schmitt trigger VT+
Schmitt trigger VT–
Input current (no pull-up/down)
Input current (22 kΩ Pull-up)
Input current (47 kΩ Pull-up)
Input current (100 kΩ Pull-up)
Input current (100 kΩ Pull-down)
Keeper Circuit Resistance
Overshoot and undershoot conditions (transitions above OVDD and below GND) on switching pads must be held below 0.6 V,
and the duration of the overshoot/undershoot must not exceed 10% of the system clock cycle. Overshoot/ undershoot must be
controlled through printed circuit board layout, transmission line impedance matching, signal line termination, or other
methods. Non-compliance to this specification may affect device reliability or cause permanent damage to the device.
To maintain a valid level, the transition edge of the input must sustain a constant slew rate (monotonic) from the current DC
level through to the target DC level, VIL or VIH. Monotonic input transition time is from 0.1 ns to 1 s.
Hysteresis of 250 mV is guaranteed over all operating conditions when hysteresis is enabled.
Use an off-chip pull resistor of less than 60 kΩ to override this keeper.
Parameter
LPDDR2 I/O DC Parameters
DDR2 Mode I/O DC Parameters
Table 12
2, 3
2, 3
Table 11. GPIO I/O DC Electrical Characteristics (continued)
i.MX53xD Applications Processors for Consumer Products, Rev. 3
1, 2
are guaranteed per the operating ranges in
1, 2
Symbol
VHYS
VT+
VT–
VIH
VIL
Iol
Iin
Iin
Iin
Iin
Iin
Vout = 0.2
Low drive
Medium drive
High drive
Max drive
Test Conditions
OVDD = 1.875 V
OVDD = 2.775 V
Vin = OVDD or 0
Vin = OVDD
Vin = OVDD
Vin = OVDD
Vin= OVDD
Vin = 0 V
Vin = 0 V
Vin = 0 V
Vin = 0 V
×
—
—
—
—
OVDD
0.7
0.5
Table
×
×
0.25
Min
2.1
4.2
6.3
8.4
—
—
—
—
—
—
—
0
OVDD
OVDD
7, unless otherwise noted.
130
0.34
0.45
Typ
—
—
—
—
—
—
—
—
—
—
4
Freescale Semiconductor
0.3
0.5
OVDD
×
×
Max
161
76
36
36
—
—
—
—
2
2
2
2
2
OVDD
OVDD
Unit
mA
μA
μA
μA
μA
μA
kΩ
V
V
V
V
V