MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 183

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MCIMX535DVV1C

Manufacturer Part Number
MCIMX535DVV1C
Description
IMX53 REV 2.1 COMM
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCIMX535DVV1C

Rohs Compliant
YES
Core Size
32bit
Program Memory Size
288KB
Cpu Speed
1GHz
Digital Ic Case Style
BGA
No. Of Pins
529
Supply Voltage Range
1.25V To 1.35V
Operating Temperature Range
-20°C To +85°C
Msl
MSL 3 - 168 Hours
Embedded Interface Type
I2C, SPI, UART
Lead Free Status / Rohs Status
Supplier Unconfirmed

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Freescale Semiconductor
DRAM_D31
DRAM_D4
DRAM_D5
DRAM_D6
DRAM_D7
DRAM_D8
DRAM_D9
DRAM_DQM0
DRAM_DQM1
DRAM_DQM2
DRAM_DQM3
DRAM_RAS
DRAM_RESET
DRAM_SDBA0
DRAM_SDBA1
DRAM_SDBA2
DRAM_SDCKE0 AB24
DRAM_SDCKE1 F22
DRAM_SDCLK_
0
DRAM_SDCLK_
0_B
DRAM_SDCLK_
1
DRAM_SDCLK_
1_B
Contact Name
Table 118. PoP 12 x 12 mm Signal Assignments, Power Rails, and I/O (continued)
G19
R27
R28
P29
T28
AF28
AE29
N28
AD27
H29
C23
M29
J28
H27
K27
K28
H23
J23
i.MX53xD Applications Processors for Consumer Products, Rev. 3
B14
T23
V23
T22
W23
AC14
AB17
N23
AB20
L23
B20
AC3
AC4
Y2
Y1
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
NVCC_EMI_DRAM
Power Rail
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3CLK
DDR3CLK
DDR3CLK
DDR3CLK
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3
DDR3
I/O Buffer
Type
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
ALT0
Mode
Alt.
Package Information and Contact Assignments
emi_DRAM_D[4]
emi_DRAM_D[5]
emi_DRAM_D[6]
emi_DRAM_D[7]
emi_DRAM_D[8]
emi_DRAM_D[9]
emi_DRAM_RESET Output Low
emi_DRAM_SDCLK
emi_DRAM_SDCLK
0_B
emi_DRAM_SDCLK
1
emi_DRAM_SDCLK
1_B
emi_DRAM_D[31]
emi_DRAM_DQM[0
]
emi_DRAM_DQM[1
]
emi_DRAM_DQM[2
]
emi_DRAM_DQM[3
]
emi_DRAM_RAS
emi_DRAM_SDBA[
0]
emi_DRAM_SDBA[
1]
emi_DRAM_SDBA[
2]
emi_DRAM_SDCK
E[0]
emi_DRAM_SDCK
E[1]
0
Out of Reset Condition
Function
Output High
Output High
Output High
Output High
Output High
Output High
Output High
Output Low
Output Low
Output Low
Output Low
Output High
Output Low
Output Low
Output Low
Output Low
Output Low
Output Floating
Output Floating
Output Floating
Output Floating
Direct
ion
1
Config./
Value
183

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