MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 4

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MCIMX535DVV1C

Manufacturer Part Number
MCIMX535DVV1C
Description
IMX53 REV 2.1 COMM
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCIMX535DVV1C

Rohs Compliant
YES
Core Size
32bit
Program Memory Size
288KB
Cpu Speed
1GHz
Digital Ic Case Style
BGA
No. Of Pins
529
Supply Voltage Range
1.25V To 1.35V
Operating Temperature Range
-20°C To +85°C
Msl
MSL 3 - 168 Hours
Embedded Interface Type
I2C, SPI, UART
Lead Free Status / Rohs Status
Supplier Unconfirmed

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Introduction
The i.MX53xD system is built around the following system on chip interfaces:
The i.MX53xD makes use of dedicated hardware accelerators to achieve state-of-the-art multimedia
performance. The use of hardware accelerators provides both high performance and low power
consumption while freeing up the CPU core for other tasks.
The i.MX53xD incorporates the following hardware accelerators:
The i.MX53xD includes the following interfaces to external devices:
4
External memory interfaces:
— 16/32-bit DDR2-800, LV-DDR2-800 or DDR3-800 up to 2 Gbyte
— 32-bit LPDDR2
— 8/16-bit NAND SLC/MLC Flash, up to 66 MHz, 4/8/14/16-bit ECC
— 8/16-bit NOR Flash, PSRAM, and cellular RAM.
— 32-bit multiplexed mode NOR Flash, PSRAM & cellular RAM.
— 8-bit Asynchronous (DTACK mode) EIM interface.
— All EIM pins are muxed on other interfaces (data with NFC pins). I/O muxing logic selects EIM
— Samsung OneNAND™ and managed NAND including eMMC up to rev 4.4 (in muxed I/O
64-bit AMBA AXI v1.0 bus—used by ARM platform, multimedia accelerators (such as VPU, IPU,
GPU3D, GPU2D) and the external memory controller (EXTMC) operating at 200 MHz.
32-bit AMBA AHB 2.0 bus—used by the rest of the bus master peripherals operating at 133 MHz.
32-bit IP bus—peripheral bus used for control (and slow data traffic) of the most system peripheral
devices operating at 66 MHz.
VPU, version 3—video processing unit
GPU3D—3D graphics processing unit, OpenGL ES 2.0, version 3, 33 Mtri/s, 200 Mpix/s, and
800 Mpix/s z-plane performance, 256 Kbyte RAM memory
GPU2D—2D graphics accelerator, OpenVG 1.1, version 1, 200 Mpix/s performance,
IPU, version 3M—image processing unit
ASRC—asynchronous sample rate converter
Hard disk drives:
— PATA, up to U-DMA mode 5, 100 MByte/s
— SATA I, 1.5 Gbps
Displays:
— Five interfaces available. Total rate of all interfaces is up to 180 Mpixels/s, 24 bpp. Up to two
port, as primary muxing at system boot.
mode)
interfaces may be active at once.
Not all interfaces are available simultaneously, depending on I/O
multiplexer configuration.
i.MX53xD Applications Processors for Consumer Products, Rev. 3
NOTE
Freescale Semiconductor

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