MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 144

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MCIMX535DVV1C

Manufacturer Part Number
MCIMX535DVV1C
Description
IMX53 REV 2.1 COMM
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MCIMX535DVV1C

Rohs Compliant
YES
Core Size
32bit
Program Memory Size
288KB
Cpu Speed
1GHz
Digital Ic Case Style
BGA
No. Of Pins
529
Supply Voltage Range
1.25V To 1.35V
Operating Temperature Range
-20°C To +85°C
Msl
MSL 3 - 168 Hours
Embedded Interface Type
I2C, SPI, UART
Lead Free Status / Rohs Status
Supplier Unconfirmed

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Electrical Characteristics
4.7.18.2 Parallel Interface (Normal ULPI) Timing
Electrical and timing specifications of Parallel Interface (Normal ULPI) for Host Port2 and Port3 are
presented in the subsequent sections.
4.7.19
This section describes the USB-OTG PHY and the USB Host port PHY parameters.
4.7.19.1 USB PHY AC Parameters
Table 102
144
US15
US16
US17
USB_Clk
USB_Data[7:0]
USB_Dir
USB_Stp
USB_Nxt
ID
USB_Stp
USB_Data
lists the AC timing parameters for USB PHY.
USB_Clk
USB_Dir/Nxt
USB PHY Parameters
Name
Output Delay Time (Stp out, Data out
Table 100. Signal Definitions - Parallel Interface (Normal ULPI)
Figure 97. USB Transmit/Receive Waveform in Parallel Mode
Setup Time (Dir&Nxt in, Data in)
i.MX53xD Applications Processors for Consumer Products, Rev. 3
Table 101. USB Timing Specification for Normal ULPI Mode
Hold Time (Dir&Nxt in, Data in)
US15
US15
Parameter
Direction
Out
I/O
In
In
In
US16
US16
Interface clock. All interface signals are synchronous to Clock.
Bi-directional data bus, driven low by the link during idle. Bus
ownership is determined by Dir.
Direction. Control the direction of the Data bus.
Stop. The link asserts this signal for 1 clock cycle to stop the
data stream currently on the bus.
Next. The PHY asserts this signal to throttle the data.
US17
Min
6.0
0.0
Signal Description
US17
Max
9.0
Unit
ns
ns
ns
Freescale Semiconductor
Reference Signal
Conditions /
10 pF
10 pF
10 pF

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