MCIMX535DVV1C Freescale Semiconductor, MCIMX535DVV1C Datasheet - Page 96

• Manufacturer Part Number: MCIMX535DVV1C
• Description: IMX53 REV 2.1 COMM
• Manufacturer: Freescale Semiconductor

Specifications of MCIMX535DVV1C

• Rohs Compliant: YES
• Core Size: 32bit
• Program Memory Size: 288KB
• Cpu Speed: 1GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 529
• Supply Voltage Range: 1.25V To 1.35V
• Operating Temperature Range: -20°C To +85°C
• Msl: MSL 3 - 168 Hours
• Embedded Interface Type: I2C, SPI, UART
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Electrical Characteristics
4.7.8.7
The interface has an 8-bit data bus, transferring a single 8-bit value (Y/U/V) in each cycle. The timing of
the interface is described in
96
2
3
Display interface clock down time
Display interface clock up time where CEIL(X) rounds the elements of X to the nearest integers towards infinity.
Interface to a TV Encoder (TVDAC)
•
•
•
•
•
•
The frequency of the clock DISP_CLK is 27 MHz (within 10%)
The HSYNC, VSYNC signals are active low.
The DRDY signal is shown as active high.
The transition to the next row is marked by the negative edge of the
HSYNC signal. It remains low for a single clock cycle.
The transition to the next field/frame is marked by the negative edge of
the VSYNC signal. It remains low for at least one clock cycles.
—
of VSYNC and HSYNC coincide.
—
coincide.
The active intervals—during which data is transferred—are marked by
the HSYNC signal being high.
At a transition to an odd field (of the next frame), the negative edges
At a transition is to an even field (of the same frame), they do not
i.MX53xD Applications Processors for Consumer Products, Rev. 3
Figure
Tdicd
Tdicu
51.
=
=
1
-- - T diclk
2
⎛
⎝
1
-- - T diclk
2
⎛
⎝
×
ceil
×
NOTE
ceil
2
---------------------------------------------------------- -
×
2
----------------------------------------------- -
DI_CLK_PERIOD
DI_CLK_PERIOD
DISP_CLK_DOWN
×
DISP_CLK_UP
⎞
⎠
⎞
⎠
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