EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 521
![IC STRATIX FPGA 20K LE 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP1S20F484C6N
Manufacturer Part Number
EP1S20F484C6N
Description
IC STRATIX FPGA 20K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S20F484C6N
Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
361
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1S20F484C6N
Manufacturer:
ALTERA
Quantity:
534
- Current page: 521 of 864
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Figure 5–37. Differential HSTL Class II Termination
Altera Corporation
July 2005
Transmitter
Differential
50 Ω
V
TT
Differential SSTL-2 Termination
The SSTL-2 Class I and II I/O standards require a 1.25-V V
1.25-V V
termination for SSTL-2 Class I and II I/O standard.
Figure 5–38. Differential SSTL-2 Class I Termination
= 0.75 V
Transmitter
Differential
TT
50 Ω
V
.
TT
Figures 5–37
= 0.75 V
25 Ω
25 Ω
High-Speed Differential I/O Interfaces in Stratix Devices
Z
Z
0
0
= 50 Ω
= 50 Ω
and
50 Ω
Z
Z
5–38
V
0
0
TT
= 50 Ω
= 50 Ω
= 0.75 V
show the device with differential
50 Ω
V
TT
Stratix Device Handbook, Volume 2
= 1.25 V
50 Ω
V
TT
= 0.75 V
50 Ω
V
TT
= 1.25 V
Differential
Receiver
REF
Differential
Receiver
and a
5–49
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