EP1S20F484C6N Altera, EP1S20F484C6N Datasheet - Page 817
![IC STRATIX FPGA 20K LE 484-FBGA](/photos/6/72/67258/544-484-fbga_sml.jpg)
EP1S20F484C6N
Manufacturer Part Number
EP1S20F484C6N
Description
IC STRATIX FPGA 20K LE 484-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F484I6N.pdf
(864 pages)
Specifications of EP1S20F484C6N
Number Of Logic Elements/cells
18460
Number Of Labs/clbs
1846
Total Ram Bits
1669248
Number Of I /o
361
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Part Number:
EP1S20F484C6N
Manufacturer:
ALTERA
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Figure 12–22. Converting POF Programming File to Intel HEX Format
Altera Corporation
September 2004
Partial Programming File Generation
In remote update mode, the Quartus II CPF utility allows an existing
application configuration page to be replaced with new data, or a new
application configuration to be added. Partial programming files are
generated to perform such configuration data updates.
In order to generate a partial programming file, you have to input the
initial POF and new configuration data (SOF) to the Quartus II CPF
utility. In addition, you have to specify the addressing mode (auto or
manual) that was used during initial POF creation. And if block
addressing was used, you should specify the block start and end
Remote System Configuration with Stratix & Stratix GX Devices
Stratix Device Handbook, Volume 2
12–39
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