CY8CTST200-24LQXI Cypress Semiconductor Corp, CY8CTST200-24LQXI Datasheet - Page 297

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CY8CTST200-24LQXI

Manufacturer Part Number
CY8CTST200-24LQXI
Description
IC MCU 32K FLASH 24UQFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-24LQXI

Program Memory Type
FLASH (32 kB)
Package / Case
24-WQFN Exposed Pad, 24-HWQFN
Applications
Touchscreen Controller
Core Processor
M8C
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
20
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
24 MHz
Number Of Timers
3
Operating Supply Voltage
1.71 V to 5.5 V
Mounting Style
SMD/SMT
Program Memory Size
32 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2956

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY8CTST200-24LQXI
Manufacturer:
CY
Quantity:
487
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
phase
Phase-Locked Loop
(PLL)
pin
pinouts
port
positive edge
posted interrupts
Power On Reset (POR)
program counter
protocol
PSoC®
PSoC blocks
PSoC Designer™
pulse
pulse width modulator
(PWM)
R
RAM
register
reset
resistance
The relationship between two signals, usually the same frequency, that determines the delay
between them. This delay between signals is either measured by time or angle (degrees).
An electronic circuit that controls an oscillator so that it maintains a constant phase angle rela-
tive to a reference signal.
A terminal on a hardware component. Also called lead.
The pin number assignment: the relation between the logical inputs and outputs of the PSoC
device and their physical counterparts in the printed circuit board (PCB) package. Pinouts
involves pin numbers as a link between schematic and PCB design (both being computer gener-
ated files) and may also involve pin names.
A group of pins, usually eight.
A transition from a logic 0 to a logic 1. Also known as a rising edge.
An interrupt that has been detected by the hardware but may or may not be enabled by its mask
bit. Posted interrupts that are not masked become pending interrupts.
A circuit that forces the PSoC device to reset when the voltage is below a pre-set level. This is
one type of hardware reset .
The instruction pointer (also called the program counter) is a register in a computer processor
that indicates where in memory the CPU is executing instructions. Depending on the details of
the particular machine, it holds either the address of the instruction being executed or the
address of the next instruction to be executed.
A set of rules. Particularly the rules that govern networked communications.
Cypress Semiconductor’s Programmable System-on-Chip (PSoC) mixed-signal array. PSoC®
is a trademark of Cypress.
See analog blocks and digital blocks .
The software for Cypress’ Programmable System-on-Chip technology.
A rapid change in some characteristic of a signal (for example, phase or frequency) from a base-
line value to a higher or lower value, followed by a rapid return to the baseline value.
An output in the form of duty cycle which varies as a function of the applied measure.
An acronym for random access memory. A data-storage device from which data can be read out
and new data can be written in.
A storage device with a specific capacity, such as a bit or byte.
A means of bringing a system back to a known state. See hardware reset and software reset .
The resistance to the flow of electric current measured in ohms for a conductor.
Glossary
297
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