CY8CTST200-24LQXI Cypress Semiconductor Corp, CY8CTST200-24LQXI Datasheet - Page 50

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CY8CTST200-24LQXI

Manufacturer Part Number
CY8CTST200-24LQXI
Description
IC MCU 32K FLASH 24UQFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-24LQXI

Program Memory Type
FLASH (32 kB)
Package / Case
24-WQFN Exposed Pad, 24-HWQFN
Applications
Touchscreen Controller
Core Processor
M8C
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
20
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
24 MHz
Number Of Timers
3
Operating Supply Voltage
1.71 V to 5.5 V
Mounting Style
SMD/SMT
Program Memory Size
32 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2956

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY8CTST200-24LQXI
Manufacturer:
CY
Quantity:
487
5.3.3
This register enables the individual interrupt sources' ability
to clear posted interrupts.
When bits in this register are read, a '1' is returned for every
bit position that has a corresponding posted interrupt. When
bits in this register are written with a '0' and ENSWINT is not
set, posted interrupts are cleared at the corresponding bit
positions. If there was not a posted interrupt, there is no
effect. When bits in this register are written with a '1' and
ENSWINT is set, an interrupt is posted in the interrupt con-
troller.
Bit 5: USB_WAKE. Read ‘0’, no posted interrupt for USB
wakeup. Read ‘1’, posted interrupt present for USB wakeup.
Write 0 AND ENSWINT = 0. Clear posted interrupt if it
exists.
Write 1 AND ENSWINT = 0. No effect.
Write 0 AND ENSWINT = 1. No effect.
Write 1 AND ENSWINT = 1. Post an interrupt for USB
wakeup.
Bit 4: Endpoint8. Read ‘0’, no posted interrupt for USB
Endpoint8. Read ‘1’, posted interrupt present for USB
Endpoint8.
Write 0 AND ENSWINT = 0. Clear posted interrupt if it
exists.
Write 1 AND ENSWINT = 0. No effect.
Write 0 AND ENSWINT = 1. No effect.
Write 1 AND ENSWINT = 1. Post an interrupt for USB
Endpoint8.
Bit 3: Endpoint7. Read ‘0’, no posted interrupt for USB
Endpoint7. Read ‘1’, posted interrupt present for USB
Endpoint7.
Write 0 AND ENSWINT = 0. Clear posted interrupt if it
exists.
Write 1 AND ENSWINT = 0. No effect.
Write 0 AND ENSWINT = 1. No effect.
Interrupt Controller
50
0,DCh
Address
INT_CLR2
INT_CLR2 Register
Name
Bit 7
Bit 6
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
USB_WAKE
Bit 5
Endpoint8
Bit 4
Write 1 AND ENSWINT = 1. Post an interrupt for USB
Endpoint7.
Bit 2: Endpoint6. Read ‘0’, no posted interrupt for USB
Endpoint6. Read ‘1’, posted interrupt present for USB
Endpoint6.
Write 0 AND ENSWINT = 0. Clear posted interrupt if it
exists.
Write 1 AND ENSWINT = 0. No effect.
Write 0 AND ENSWINT = 1. No effect.
Write 1 AND ENSWINT = 1. Post an interrupt for USB
Endpoint6.
Bit 1: Endpoint5. Read ‘0’, no posted interrupt for USB
Endpoint5. Read ‘1’, posted interrupt present for USB
Endpoint5.
Write 0 AND ENSWINT = 0. Clear posted interrupt if it
exists.
Write 1 AND ENSWINT = 0. No effect.
Write 0 AND ENSWINT = 1. No effect.
Write 1 AND ENSWINT = 1. Post an interrupt for USB
Endpoint5.
Bit 0: Endpoint4. Read ‘0’, no posted interrupt for USB
Endpoint4. Read ‘1’, posted interrupt present for USB
Endpoint4.
Write 0 AND ENSWINT = 0. Clear posted interrupt if it
exists.
Write 1 AND ENSWINT = 0. No effect.
Write 0 AND ENSWINT = 1. No effect.
Write 1 AND ENSWINT = 1. Post an interrupt for USB
Endpoint4.
For additional information, refer to the
page
246.
Endpoint7
Bit 3
Endpoint6
Bit 2
Endpoint5
Bit 1
INT_CLR2 register on
Endpoint4
Bit 0
RW : 00
Access
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