CY8CTST200-24LQXI Cypress Semiconductor Corp, CY8CTST200-24LQXI Datasheet - Page 55

• Manufacturer Part Number: CY8CTST200-24LQXI
• Description: IC MCU 32K FLASH 24UQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: TrueTouch™r

Specifications of CY8CTST200-24LQXI

• Program Memory Type: FLASH (32 kB)
• Package / Case: 24-WQFN Exposed Pad, 24-HWQFN
• Applications: Touchscreen Controller
• Core Processor: M8C
• Controller Series: CY8CT
• Ram Size: 2K x 8
• Interface: I²C, SPI, UART/USART, USB
• Number Of I /o: 20
• Voltage - Supply: 1.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Processor Series: CY8CTxx2xx
• Core: M8C
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: I2C, SPI
• Maximum Clock Frequency: 24 MHz
• Number Of Timers: 3
• Operating Supply Voltage: 1.71 V to 5.5 V
• Mounting Style: SMD/SMT
• Program Memory Size: 32 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-2956

This chapter discusses the General Purpose I/O (GPIO) and its associated registers, which is the circuit responsible for inter-
facing to the I/O pins of a PSoC device. The GPIO blocks provide the interface between the M8C core and the outside world.
They offer a large number of configurations to support several types of input/output (IO) operations for both digital and analog
systems. For a complete table of the GPIO registers, refer to the
registers in address order, refer to the
6.1
The GPIO in the CY8CTMG20x, CY8CTST200 devices are all uniform, except that Port 0 and Port 1 GPIO have stronger
high drive. In addition to higher drive strength, Port 1 GPIO have an option for regulated output level. These distinctions are
discussed in more detail in the section
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
6. General Purpose I/O (GPIO)
Drive Modes
DM1
Architectural Description
Write PRTxDR
0
0
1
1
Note Alt. Select/
Data is not available
on all pins.
Alt. Select
DM0
Alt. Data
0
1
0
1
Drive Mode
Resistive Pull Up
Strong Drive
High Impedance
Open Drain
2:1
DM1
DM0
Diagram
Number
Drive
Logic
Register Reference chapter on page
Port 1 Distinctions on page 56
0
1
2
3
REG_EN
Figure 6-1. GPIO Block Diagram
Data = 0
Strong
Strong
An. High Z
Strong
Vdd
5.6k
LDO
Vdd
Data = 1
Note No diode to
Resistive
Strong
High Z
High Z
Vdd for Port 1
Vdd
Port 1
Only
PSoC Core on page
0.
and
Port 0 Distinctions on page
187.
DM(1:0) = 10b
1.
23. For a quick reference of all PSoC
Read PRTxDR
2.
Pin
57.
interrupt logic)
(e.g., I2C)
Data
Alt. Input
Bus
(to GPIO
3.
INBUF
[+] Feedback
55