CY8CTST200-24LQXI Cypress Semiconductor Corp, CY8CTST200-24LQXI Datasheet - Page 31

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CY8CTST200-24LQXI

Manufacturer Part Number
CY8CTST200-24LQXI
Description
IC MCU 32K FLASH 24UQFN
Manufacturer
Cypress Semiconductor Corp
Series
TrueTouch™r
Datasheet

Specifications of CY8CTST200-24LQXI

Program Memory Type
FLASH (32 kB)
Package / Case
24-WQFN Exposed Pad, 24-HWQFN
Applications
Touchscreen Controller
Core Processor
M8C
Controller Series
CY8CT
Ram Size
2K x 8
Interface
I²C, SPI, UART/USART, USB
Number Of I /o
20
Voltage - Supply
1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Processor Series
CY8CTxx2xx
Core
M8C
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
24 MHz
Number Of Timers
3
Operating Supply Voltage
1.71 V to 5.5 V
Mounting Style
SMD/SMT
Program Memory Size
32 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-2956

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY8CTST200-24LQXI
Manufacturer:
CY
Quantity:
487
2.5.3
The three-byte instruction formats are the second most
prevalent instruction formats. These instructions need three
bytes because they either move data between two
addresses in the user accessible address space (registers
and RAM) or they hold 16-bit absolute addresses as the
destination of a long jump or long call.
Table 2-5. Three-Byte Instruction Formats
The first instruction format, shown in the first row of
Table
These instructions change program execution uncondition-
ally to an absolute address. The instructions use an 8-bit
opcode, leaving room for a 16-bit destination address.
PSoC CY8CTMG20x and CY8CTST200 TRM, Document No. 001-53603 Rev. *C
8-Bit Opcode
8-Bit Opcode
8-Bit Opcode
2-5,
Byte 0
is used by the LJMP and LCALL instructions.
Three-Byte Instructions
16-Bit Address (MSB, LSB)
8-Bit Address
8-Bit Address
Byte 1
8-Bit Data
8-Bit Address
Byte 2
The second three-byte instruction format, shown in the sec-
ond row of
ing modes:
The third three-byte instruction format, shown in the third
row of
addressing mode, which is used by only one instruction.
This instruction format uses an 8-bit opcode followed by two
8-bit addresses. The first address is the destination address
in RAM, while the second address is the source address in
RAM. The following is an example of this instruction:
MOV [7], [5]
Destination Direct Source Immediate (ADD [7], 5)
Destination Indexed Source Immediate
(ADD [X+7], 5)
Table
Table
2-5,
2-5,
is for the Destination Direct Source Direct
is used by the following two address-
CPU Core (M8C)
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