MC68340AG16E Freescale Semiconductor, MC68340AG16E Datasheet - Page 161

• Manufacturer Part Number: MC68340AG16E
• Description: IC MPU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68340AG16E

• Processor Type: M683xx 32-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Controller Family/series: 68K
• Core Size: 32 Bit
• No. Of I/o's: 16
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Details

5.3.3.4 LOGIC INSTRUCTIONS. The logical operation instructions (AND, OR, EOR, and
NOT) perform logical operations with all sizes of integer data operands. A similar set of
immediate instructions (ANDI, ORI, and EORI) provide these logical operations with all
sizes of immediate data. The test (TST) instruction arithmetically compares the operand
with zero, placing the result in the CCR. Table 5-6 summarizes the logical operations.
5.3.3.5 SHIFT AND ROTATE INSTRUCTIONS. The arithmetic shift instructions, ASR and
ASL, and logical shift instructions, LSR and LSL, provide shift operations in both
directions. The ROR, ROL, ROXR, and ROXL instructions perform rotate (circular shift)
operations, with and without the extend bit. All shift and rotate operations can be
performed on either registers or memory.
Register shift and rotate operations shift all operand sizes. The shift count may be
specified in the instruction operation word (to shift from 1 to 8 places) or in a register
(modulo 64 shift count).
Memory shift and rotate operations shift word-length operands one bit position only. The
SWAP instruction exchanges the 16-bit halves of a register. Performance of shift/rotate
instructions is enhanced so that use of the ROR and ROL instructions with a shift count of
eight allows fast byte swapping. Table 5-7 is a summary of the shift and rotate operations.
5-24
Instruction
ANDI
EORI
AND
EOR
NOT
TST
ORI
OR
# data
# data
# data
Operand
Dn, ea
Dn, ea
Dn, ea
Syntax
ea , Dn
ea , Dn
ea
ea
Freescale Semiconductor, Inc.
ea
ea
ea
For More Information On This Product,
Table 5-6. Logic Operations
MC68340 USER’S MANUAL
Operand Size
Go to: www.freescale.com
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
Source
Immediate Data
Source
Immediate Data
Destination
Source V Destination
Immediate Data V Destination
Source – 0, to set condition codes
Destination
Destination
Destination
Destination
Destination
Operation
Destination
Destination
Destination
Destination
Destination
Destination
MOTOROLA